Inventor

MOTOYAMA KOICHI

US127 patents

⚠️ This page may combine multiple inventors who share the name “MOTOYAMA KOICHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOTOYAMA KOICHI

IBM

Void-free metallic interconnect structures with self-formed diffusion barrier layers

Dual metal interconnect structure

Embedded anti-fuses for small scale applications

Enlarged contact area structure using noble metal cap and noble metal liner

Binary metallization structure for nanoscale dual damascene interconnects

Enabling low resistance gates and contacts integrated with bilayer dielectrics

Reflow interconnect using Ru

Structure and fabrication method for electromigration immortal nanoscale interconnects

Air-gap containing metal interconnects

Structure and method for improved stabilization of cobalt cap and/or cobalt liner in interconnects

Copper interconnect with CVD liner and metallic cap

Via CD controllable top via structure

Anti-fuse with laterally extended liner

Semiconductor structure with stacked vias having dome-shaped tips

Magneto-resistive random access memory with laterally-recessed free layer

Self-aligned top via

Dual damascene fully aligned via in interconnects

Physical unclonable function for MRAM structures

Pitch multiplication with high pattern fidelity

Interconnects with enlarged contact area

Top via with hybrid metallization

Interconnects having air gap spacers

Hybrid BEOL metallization utilizing selective reflection mask

Binary metallization structure for nanoscale dual damascene interconnects

Method of forming a dual metal interconnect structure

Ion flow barrier structure for interconnect metallization

Contact structure for power delivery on semiconductor device

Damascene MRAM device

Tight pitch directional selective via growth

Magneto-resistive random access memory with tapered sidewalls

Subtractive skip via

Semiconductor structure with backside metallization layers

Magnetoresistive random-access memory with top and bottom electrodes deposited in unison

MRAM integration with self-aligned direct back side contact

MRAM structure with a T-shaped ferromagnetic layer

MRAM device with octagon profile

Metal hard mask for precise tuning of mandrels

MRAM top electrode structure with liner layer

MRAM device structure

Electronic fuse structure embedded in top via

Coaxial top MRAM electrode

Alternating spacers for pitch structure

Line formation with cut-first tip definition

Physical unclonable function for secure integrated hardware systems

Interconnect structures including self aligned vias

Bottom conductive structure with a limited top contact area

Interconnect structures including self aligned vias

NEC ELECTRONICS CORP

Semiconductor device and method for manufacturing the same

Semiconductor device and method for manufacturing the same

BAUMANN FRIEDER HAINRICH

Copper interconnect with CVD liner and metallic cap