Inventor

KUO CHIEN-LI

TW117 patents

⚠️ This page may combine multiple inventors who share the name “KUO CHIEN-LI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KUO CHIEN-LI

UNITED MICROELECTRONICS CORP

Method for forming dielectric layer of capacitor

Through substrate via process

Method of fabrication of a contact plug in an embedded memory

Method of forming dynamic random access memory

Method for in-situ fabrication of a landing via and a strip contact in an embedded memory

Method of fabricating a MOS transistor in an embedded memory

Method of performing a pocket implantation on a MOS transistor of a memory cell of a DRAM

Method for manufacturing embedded memory with different spacer widths

Method of fabricating self-align-contact

Bonding-pad structure for integrated circuit and method of fabricating the same

Method for manufacturing shallow trench isolation

Method for forming semiconductor structure having through silicon via for signal and shielding structure

Method of fabricating a phase change memory and phase change memory

Method for forming a metal structure

On-chip test circuit for assessing chip integrity

Method of forming a landing pad on a semiconductor wafer

Operating voltage tuning method for static random access memory

Method for forming semiconductor device with through silicon via

Method of packaging stacked dies on wafer using flip-chip bonding

Through-substrate structure and method for fabricating the same

Chip with through silicon via electrode and method of forming the same

Phase change memory

Method for making an embedded memory MOS

Fabrication method for an embedded dynamic random access memory (DRAM)

Electrical fuse structure

Trench-capacitor DRAM device and manufacture method thereof

Flip chip package with reduced thermal stress

Method for fabricating a MOS transistor of an embedded memory

Memory structure with thin film transistor and method for fabricating the same

Method of making a local interconnect in an embedded memory

Method of fabricating node contact

Method for reducing short channel effect

Method for reducing resistance of contact window

Method of fabricating self-align-contact

Method for manufacturing local interconnect

Method of fabricating self-align-contact

Method for manufacturing shallow trench isolation structure

TAIWAN SEMICONDUCTOR MFG CO LTD

Low warpage high density trench capacitor

Passivation scheme for pad openings and trenches

Semiconductor device

Method for forming group III-V device structure

Semiconductor device and method for fabricating the same

Passivation scheme for pad openings and trenches

Passivation scheme for pad openings and trenches

KUO CHIEN-LI

Semiconductor device

TSV structure and method for forming the same

Semiconductor device

LIN YUNG-CHANG

Capacitor structure and method of forming the same

Chen jia-jia

Through silicon via process

UNITED MICROELECTRONIC CORP

Method for fabricating a MOS transistor of an embedded memory