Inventor

MOREIN STEPHEN

US47 patents

⚠️ This page may combine multiple inventors who share the name “MOREIN STEPHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MOREIN STEPHEN

INTEL CORP

High throughput additive manufacturing for integrated circuit components containing traces with feature size and grain boundaries

Technologies for high throughput additive manufacturing for integrated circuit components

Microelectronic assemblies having topside power delivery structures

Modular microchannel thermal solutions for integrated circuit devices

High-throughput additively manufactured power delivery vias and traces

Microelectronic assemblies including stacked dies coupled by a through dielectric via

Conformal power delivery structures near high-speed signal traces

Integrating voltage regulators and passive circuit elements with top side power planes in stacked die architectures

Microelectronic assemblies having topside power delivery structures

Microelectronic assemblies having topside power delivery structures

ATI TECHNOLOGIES ULC

Multi-thread graphics processing system

Multi-thread graphics processing system

Multi-thread graphics processing system

Multi-thread graphics processing system

Multi-processor architecture and method

Multi-thread graphics processing system

Multi-thread graphics processing system

Multi-thread graphics processing system

Write data mask method and system

SYNAPTICS INC

Oversampled receiver for transition encoded signaling

Disabling display lines during input sensing periods

Device with improved circuit positioning

Multi-function keys providing additional functions and previews of functions

Ramp digital to analog converter

Calibration of ramp digital to analog converter

ADEIA SEMICONDUCTOR TECH LLC

Diffused bitline replacement in stacked wafer memory

Over and under interconnects

Embedded metal lines

Diffused bitline replacement in memory

ATI TECHNOLOGIES INC

Multi-thread graphic processing system

Dynamic bus inversion method and system

Asymmetrical IO method and system

ADVANCED MICRO DEVICES INC

Error detection in high-speed asymmetric interfaces

Internal bus architecture and method in multi-processor systems

Peripheral component

MOREIN STEPHEN

Internal BUS bridge architecture and method in multi-processor systems

Peer-to-peer special purpose processor architecture and method

System and apparatus for transmitting phase information from a client to a host between read and write operations

LEFEBVRE LAURENT

Multi-thread graphics processing system

Multi-thread graphics processing system

MACRI JOSEPH

Error detection in high-speed asymmetric interfaces utilizing dedicated interface lines

Error detection in high-speed asymmetric interfaces

XCELSIS CORP

Stacked architecture for three-dimensional NAND

Abstracted NAND logic in stacks

INVENSAS CORP

Diffused bitline replacement in stacked wafer memory

ATI INT SRL

Method and apparatus for processing portions of primitives that are being rendered

MACRI JOSEPH D

Write data mask method and system