Inventor

RUSSELL ANDREW C

US42 patents

⚠️ This page may combine multiple inventors who share the name “RUSSELL ANDREW C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RUSSELL ANDREW C

FREESCALE SEMICONDUCTOR INC

SRAM with read and write assist

Integrated circuit having a memory with low voltage read/write operation

Integrated circuit having memory with configurable read/write operations and method therefor

Integrated circuit having a memory with low voltage read/write operation

Minimum memory operating voltage technique

Level shifter for change of both high and low voltage

Memory system with RAM array and redundant RAM memory cells having a different designed cell circuit topology than cells of non redundant RAM array

Memory with increased write margin bitcells

Controlled reliability in an integrated circuit

Integrated circuit having an embedded memory and method for testing the memory

Soft error detection in a memory system

Memory with read cycle write back

Dynamic scannable latch and method of operation

Memory circuit

Soft error detection in a memory system

Byte writeable memory with bit-column voltage selection and column redundancy

Edge coupling of semiconductor dies

RUSSELL ANDREW C

Multi-port memory having a variable number of used write ports

Memory using multiple supply voltages

Shared resource based thread scheduling with affinity and/or selectable criteria

Integrated circuit having variable memory array power supply voltage

Memory using voltage to improve reliability for certain data types

Method and apparatus for reducing the number of speculative accesses to a memory array

System with feature of saving dynamic power of flip-flop banks

Memory having improved reliability for certain data types

Data processing having multiple low power modes and method therefor

RAMARAJU RAVINDRARAJ

Memory with word line access control

Data type dependent memory scrubbing

Memory voltage regulator with leakage current voltage control

Selective memory scrubbing based on data type

Memory column drowsy control

System and method for cache access

Content addressable memory with error detection

Memory with power savings for unnecessary reads

Electronic circuit having shared leakage current reduction circuits

ZHANG SHAYAN

Integrated circuit memory having assisted access and method therefor

Voltage-based memory size scaling in a data processing system

Methods for testing a memory embedded in an integrated circuit

KENKARE PRASHANT U

Integrated circuit having memory repair information storage and method therefor

NGUYEN HUY B

Memory with low voltage mode operation

PELLEY PERRY H

Multi-port register file with multiplexed data

ASHOK AMBICA

Write contention-free, noise-tolerant multi-port bitcell