Inventor

SHANKAR KAPIL

US33 patents

⚠️ This page may combine multiple inventors who share the name “SHANKAR KAPIL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHANKAR KAPIL

ANDAPT INC

Programmable logic device with integrated high voltage power FET

Power management integrated circuit integrating field effect transistors and programmable fabric

Programmable logic device with integrated high voltage power FET

Adaptive analog blocks with digital wrappers integrated onto programmable fabric

Precision modulation timer (PMT) integrated in a programmable logic device

Noise-immune reference (NREF) integrated in a programmable logic device

Precision modulation timer (PMT) integrated in a programmable logic device

Noise-immune reference (NREF) integrated in a programmable logic device

Compensation memory (CM) for power application

Pulse-width modulation (PWM) control loop for power application

Programmable analog and digital input/output for power application

Pulse-width modulation (PWM) control loop for power application

Compensation memory (CM) for power application

Programmable analog and digital input/output for power application

Method and apparatus for analog to digital error conversion with multiple symmetric transfer functions

Method and apparatus for analog to digital error conversion with multiple symmetric transfer functions

Scalable integrated MOSFET (SIM)

LATTICE SEMICONDUCTOR CORP

Application specific modules in a programmable logic device

Programmable interconnect structure for logic blocks

Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device

Output logic macrocell

Output logic macrocell with enhanced functional capabilities

Programmable integrated-circuit switch

Programmable logic device providing product term sharing and steering to the outputs of the programmable logic device

Input routing pool

ADVANCED MICRO DEVICES INC

Programmable logic device with subroutine stack and random access memory

Integrated circuit programmable sequencing element apparatus

Method for designing a control sequencer

Logic controller having programmable logic &#34;and&#34; array using a programmable gray-code counter

Programmable logic cell with flexible clocking and flexible feedback

Programmable logic device with buried registers selectively multiplexed with output registers to ports, and preload circuitry therefor

Programmable logic device with observability and preloadability for buried state registers

Programmable logic device with observability and preload circuitry for buried state registers

Logic controller having programmable logic "and" array using a programmable gray-code counter