P

Inventor

NAEIMI HELIA

US21 patents
⚠️ This page may combine multiple inventors who share the name “NAEIMI HELIA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

16 patents
US9299412B2Mar 29, 2016

Write operations in spin transfer torque memory

INTEL CORP51 citations94
US9342403B2May 17, 2016

Method and apparatus for managing a spin transfer torque memory

INTEL CORP32 citations92
US9589620B1Mar 7, 2017

Destructive reads from spin transfer torque memory under read-write conditions

INTEL CORP6 citations83
US9558807B2Jan 31, 2017

Apparatuses and systems for increasing a speed of removal of data stored in a memory cell

INTEL CORP2 citations73
US9335996B2May 10, 2016

Recycling error bits in floating point units

INTEL CORP2 citations59
US10552257B2Feb 4, 2020

Adaptive error correction in memory devices

INTEL CORP0 citations52
US10061376B2Aug 28, 2018

Opportunistic power management for managing intermittent power available to data processing device having semi-non-volatile memory or non-volatile memory

INTEL CORP1 citations52
US9858984B2Jan 2, 2018

Apparatuses, methods, and systems for increasing a speed of removal of data from a memory cell

INTEL CORP0 citations52
US9747967B2Aug 29, 2017

Magnetic field-assisted memory operation

INTEL CORP1 citations52
US10467137B2Nov 5, 2019

Apparatus, system, integrated circuit die, and method to determine when to bypass a second level cache when evicting modified data from a first level cache

INTEL CORP0 citations51
US10423540B2Sep 24, 2019

Apparatus, system, and method to determine a cache line in a first memory device to be evicted for an incoming cache line from a second memory device

INTEL CORP0 citations51
US10297302B2May 21, 2019

Magnetic storage cell memory with back hop-prevention

INTEL CORP0 citations51
US9514796B1Dec 6, 2016

Magnetic storage cell memory with back hop-prevention

INTEL CORP1 citations51
US10713052B2Jul 14, 2020

Prefetcher for delinquent irregular loads

INTEL CORP0 citations50
US9703626B2Jul 11, 2017

Recycling error bits in floating point units

INTEL CORP0 citations49
US9978432B2May 22, 2018

Write operations in spin transfer torque memory

INTEL CORP0 citations41

NAEIMI HELIA

4 patents

CALIFORNIA INST OF TECHN

1 patent