Inventor

SATPATHY SUDHIR

US41 patents

⚠️ This page may combine multiple inventors who share the name “SATPATHY SUDHIR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SATPATHY SUDHIR

INTEL CORP

Apparatuses and methods for frequency scaling a message scheduler data path of a hashing accelerator

SMS4 acceleration hardware

Unified AES-SMS4—Camellia symmetric key block cipher acceleration

Physically unclonable function with feed-forward addressing and variable latency output

Device, system, and method to change a consistency of behavior by a cell circuit

Bitcoin mining hardware accelerator with optimized message digest and message scheduler datapath

Hardware accelerators and methods for high-performance authenticated encryption

Hardware accelerator for platform firmware integrity check

Techniques for secure authentication

Hybrid AES-SMS4 hardware accelerator

Compact, low power advanced encryption standard circuit

Technology for generating a keystream while combatting side-channel attacks

Apparatus and method for generating hybrid static/dynamic entropy physically unclonable function

Self-calibrated von-neumann extractor

Area efficient decompression acceleration

META PLATFORMS TECH LLC

System on a chip (SoC) communications to prevent direct memory access (DMA) attacks

Tamper detection and prevention in computer systems having one-time programmable memory

ROM instruction authentication and integrity verification for artificial reality security controller

Encryption and decryption engines with selective key expansion skipping

Inline encryption of packet data in a wireless communication system

Wireless communication with code separation

Parallel scheduling of encryption engines and decryption engines to prevent side channel attacks

Encryption engine having randomized round scheduling to prevent side channel attacks

System on a chip (SOC) communications to prevent direct memory access (DMA) attacks

Encryption and decryption engines with hybrid masking to prevent side channel attacks

Pixel block encoder capable of jointly encoding pixel channels

Isolation of secrets from an operating system

High throughput storage encryption

FACEBOOK TECH LLC

Secure device attestation and mutual authentication of artificial reality devices

Device authentication based on inconsistent responses

Encryption engine and decryption engine with glitch randomization to prevent side channel attacks

Encryption and decryption engines with selective key expansion skipping

Inline encryption of packet data in a wireless communication system

Multi-key encryption and decryption for side channel attack prevention

Monitoring circuit including cascaded s-boxes for fault injection attack protection

Encryption engine having randomized round scheduling to prevent side channel attacks

Scalable encryption engine having partitionable data paths

Adaptive signal synchronization and glitch suppression for encryption engines

Swapping of encryption and decryption operations for side channel attack protection

Mixed sequencing of polynomial-diverse encryption and decryption operations for side channel attack protection

SATPATHY SUDHIR

Priority-based routing