Inventor

HSU FENG-CHENG

TW115 patents

⚠️ This page may combine multiple inventors who share the name “HSU FENG-CHENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HSU FENG-CHENG

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor structure and manufacturing method thereof

Plurality of semiconductor devices encapsulated by a molding material attached to a redistribution layer

Multi-chip wafer level packages and methods of forming the same

Semiconductor structure and manufacturing method thereof

Semiconductor package structure and method of manufacturing the same

Integrated fan-out structure with guiding trenches in buffer layer

Semiconductor structure and manufacturing method thereof

Three-layer Package-on-Package structure and method forming same

Semiconductor structure and manufacturing method thereof

Semiconductor package with dual sides of metal routing

Semiconductor structure and manufacturing method thereof

Semiconductor package with redistribution structure and pre-made substrate on opposing sides for dual-side metal routing

Semiconductor package and method manufacturing the same

Chip package structure

Method for forming chip package with recessed interposer substrate

Chip package structure and method for forming the same

Semiconductor package structure

Semiconductor structure and manufacturing method thereof

Semiconductor package and manufacturing method of the same

Method of forming contact holes in a fan out package

Integrated fan-out structure with guiding trenches in buffer layer

Semiconductor package structure and manufacturing method thereof

Package structure and method of fabricating the same

Underfill pattern with gap

Multi-chip packages and methods of forming the same

Integrated circuit package and method forming same

Chip package structure with cavity in interposer

Method for forming package structure with lid

Chip package structure

Multi-chip packages

Chip package structure with cavity in interposer

Semiconductor device encapsulated by molding material attached to redestribution layer

Reinforcing package using reinforcing patches

Semiconductor structure and manufacturing method thereof

Chip package structure having warpage control and method of forming the same

Package structure with lid and method for forming the same

Methods of forming multi-chip wafer level packages

Multi fan-out package structure and method for forming the same

Semiconductor package and method for forming the same

Chip package with recessed interposer substrate

Semiconductor structure and manufacturing method thereof

Method for forming chip package structure

Semiconductor package structure and method of manufacturing the same

Package structure and method of manufacturing the same

Method of forming semicondcutor device package

Manufacturing method of semiconductor package

Three-layer package-on-package structure and method forming same

TAIWAN SEMICONDUCTOR MFG

Double patterning strategy for contact hole and trench

CHEN CHUN-KUANG

Double patterning strategy for contact hole and trench in photolithography

HSU FENG-CHENG

Double patterning strategy for contact hole and trench in photolithography