Inventor

DEL GATTO NICOLA

IT38 patents

⚠️ This page may combine multiple inventors who share the name “DEL GATTO NICOLA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DEL GATTO NICOLA

MICRON TECHNOLOGY INC

Read data path

Read data path

Controller cache architeture

Cache bypass

Arbitration policy to prioritize read command dequeuing by delaying write command dequeuing

Optimized control of the commands running in a cache

Control of back pressure based on a total number of buffered read and write entries

Cache architectures with address delay registers for memory devices

Cleaning memory blocks using multiple types of write operations

Cache architectures with address delay registers for memory devices

Cleaning memory blocks using multiple types of write operations

Dual-level refresh management

Dual-level refresh management

Managed memory systems with multiple priority queues

Managed memory systems with multiple priority queues

Interrupt mode or polling mode for memory devices

Interrupt mode or polling mode for memory devices

Performance throttling module

Managing performance throttling in a digital controller

Low latency storage based on data size

Memory controller for managing raid information

Write command execution for data protection and recovery schemes

Controller to alter systems based on metrics and telemetry

Controller architecture for reliability, availability, serviceability access

ST MICROELECTRONICS SRL

Circuit for biasing an input node of a sense amplifier with a pre-charge stage

Voltage regulator with very quick response

Memory device with a ramp-like voltage biasing structure based on a current generator

Memory device

Programming method of multilevel memories and corresponding circuit

Control of voltages during erase and re-program operations of memory cells

Memory device and method of operating the same with high rejection of the noise on the high-voltage supply line

Method for configuring a voltage regulator

Regulator of a digital-to-analog converter and related converter

Programming method for non volatile multilevel memory cells and corresponding programming circuit

Circuit for distributing a test signal applied to a pad of an electronic device

DEL GATTO NICOLA

Reading circuit for semiconductor memory

MAGNAVACCA ALESSANDRO

Memory device employing three-level cells and related methods of managing

CASCONE DAVIDE

Voltage regulator for the programming circuit of a memory cell