Inventor

EN GAD EYAL

US17 patents

⚠️ This page may combine multiple inventors who share the name “EN GAD EYAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

EN GAD EYAL

MICRON TECHNOLOGY INC

Error correction based on rate adaptive low density parity check (LDPC) codes with flexible column weights in the parity check matrices

Bit mask for syndrome decoding operations

Bypassing iterations in a bit flipping decoder using a least reliable bit energy function

Separation of parity columns in bit-flip decoding of low-density parity-check codes with pipelining and column parallelism

Bit flipping decoder with dynamic bit flipping criteria

Bit flipping decoder with optimized maximum iterations for varied bit flipping thresholds

Syndrome decoding system

Efficient memory use to support soft information in bit flipping decoders

Syndrome decoding system

CALIFORNIA INST OF TECHN

Rank-modulation rewriting codes for flash memories

NAND flash reliability with rank modulation

Flash memories using minimum push up, multi-cell and multi-permutation schemes for data storage

Flash memories using minimum push up, multi-cell and multi-permutation schemes for data storage

Joint rewriting and error correction in write-once memories

Rank-modulation rewriting codes for flash memories

Rewriting flash memories by message passing

Asymmetric error correction and flash-memory rewriting using polar codes