Inventor

KIENTZ STEVEN MICHAEL

US54 patents

⚠️ This page may combine multiple inventors who share the name “KIENTZ STEVEN MICHAEL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KIENTZ STEVEN MICHAEL

MICRON TECHNOLOGY INC

Bin placement according to program-erase cycles

Smart sampling for block family scan

Block family-based error avoidance for memory devices

Open block family duration limited by time and temperature

Die family management on a memory device using block family error avoidance

Open block family duration limited by temperature variation

Error-handling flows in memory devices based on bins

Write data for bin resynchronization after power loss

Block family-based error avoidance for memory devices

Open block family duration limited by temperature variation

Block family-based error avoidance for memory devices

Open block family duration limited by time and temperature

Temperature-compensated time estimate for a block to reach a uniform charge loss state

Measurement of representative charge loss in a block to determine charge loss state

Temperature-compensated time estimate for a block to reach a uniform charge loss state

Combining sets of memory blocks in a memory device

Measurement of representative charge loss in a block to determine charge loss state

Smart sampling for block family scan

Charge loss scan operation management in memory devices

Associating multiple cursors with block family of memory device

Associating multiple cursors with block family of memory device

Temperature-based block family combinations in a memory device

Adaptable charge loss scanning cadence in a memory sub-system

Die family management on a memory device using block family error avoidance

Tracking and refreshing state metrics in memory sub-systems

Adaptive calibration for threshold voltage offset bins

Determining read voltage offset in memory devices

Determining read voltage offset in memory devices

Two-sided page scans with calibration feedback

Charge loss mitigation throughout memory device lifecycle by proactive window shift

Tracking and refreshing state metrics in memory sub-systems

Trim value loading management in a memory sub-system

Determination of state metrics of memory sub-systems following power events

Write data for bin resynchronization after power loss

Bin placement according to program-erase cycles

Tracking and refreshing state metrics in memory sub-systems

Trim value loading management in a memory sub-system

Determination of state metrics of memory sub-systems following power events

Threshold voltage bin calibration at memory device power up

Threshold voltage bin calibration at memory device power up

Charge loss tracking through targeted bit count

Slow-charge-loss tracking using feedback-control loop

Adaptive temperature compensation for a memory device

Program continuation strategies after memory device power loss

Error avoidance based on voltage distribution parameters of blocks

Error avoidance based on voltage distribution parameters

STORAGE TECHNOLOGY CORP

Multi-directional cartridge memory antenna designs

Reducing tape media damage in data regions

Band identification using a single C-core servo write head for timing based servo patterns

MICRON TECHNOLGY INC

Charge loss mitigation throughout memory device lifecycle by proactive window shift