P

Inventor

RATHSACK BENJAMEN M

US29 patents
⚠️ This page may combine multiple inventors who share the name “RATHSACK BENJAMEN M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TOKYO ELECTRON LTD

23 patents
US9613801B2Apr 4, 2017

Integration of absorption based heating bake methods into a photolithography track system

TOKYO ELECTRON LTD464 citations98
US9136110B2Sep 15, 2015

Multi-step bake apparatus and method for directed self-assembly lithography control

TOKYO ELECTRON LTD65 citations98
US9349604B2May 24, 2016

Use of topography to direct assembly of block copolymers in grapho-epitaxial applications

TOKYO ELECTRON LTD15 citations92
US9418860B2Aug 16, 2016

Use of topography to direct assembly of block copolymers in grapho-epitaxial applications

TOKYO ELECTRON LTD12 citations91
US7673278B2Mar 2, 2010

Enhanced process yield using a hot-spot library

TOKYO ELECTRON LTD26 citations91
US9412611B2Aug 9, 2016

Use of grapho-epitaxial directed self-assembly to precisely cut lines

TOKYO ELECTRON LTD10 citations84
US10020195B2Jul 10, 2018

Chemical amplification methods and techniques for developable bottom anti-reflective coatings and dyed implant resists

TOKYO ELECTRON LTD8 citations83
US9735026B2Aug 15, 2017

Controlling cleaning of a layer on a substrate using nozzles

TOKYO ELECTRON LTD7 citations83
US9618848B2Apr 11, 2017

Methods and techniques to use with photosensitized chemically amplified resist chemicals and processes

TOKYO ELECTRON LTD12 citations83
US9519227B2Dec 13, 2016

Metrology for measurement of photosensitizer concentration within photo-sensitized chemically-amplified resist (PS-CAR)

TOKYO ELECTRON LTD12 citations83
US9209014B2Dec 8, 2015

Multi-step bake apparatus and method for directed self-assembly lithography control

TOKYO ELECTRON LTD4 citations73
US10622267B2Apr 14, 2020

Facilitation of spin-coat planarization over feature topography during substrate fabrication

TOKYO ELECTRON LTD2 citations72
US10429745B2Oct 1, 2019

Photo-sensitized chemically amplified resist (PS-CAR) simulation

TOKYO ELECTRON LTD3 citations72
US9711419B2Jul 18, 2017

Substrate backside texturing

TOKYO ELECTRON LTD3 citations72
US9454081B2Sep 27, 2016

Line pattern collapse mitigation through gap-fill material application

TOKYO ELECTRON LTD4 citations72
US9281251B2Mar 8, 2016

Substrate backside texturing

TOKYO ELECTRON LTD3 citations72
US9147574B2Sep 29, 2015

Topography minimization of neutral layer overcoats in directed self-assembly applications

TOKYO ELECTRON LTD2 citations63
US12165870B2Dec 10, 2024

Chemical amplification methods and techniques for developable bottom anti-reflective coatings and dyed implant resists

TOKYO ELECTRON LTD0 citations62
US9793137B2Oct 17, 2017

Use of grapho-epitaxial directed self-assembly applications to precisely cut logic lines

TOKYO ELECTRON LTD1 citations52
US9715172B2Jul 25, 2017

Use of topography to direct assembly of block copolymers in grapho-epitaxial applications

TOKYO ELECTRON LTD0 citations52
US9633847B2Apr 25, 2017

Using sub-resolution openings to aid in image reversal, directed self-assembly, and selective deposition

TOKYO ELECTRON LTD1 citations52
US10534266B2Jan 14, 2020

Methods and techniques to use with photosensitized chemically amplified resist chemicals and processes

TOKYO ELECTRON LTD0 citations51
US10170354B2Jan 1, 2019

Subtractive methods for creating dielectric isolation structures within open features

TOKYO ELECTRON LTD0 citations42

RATHSACK BENJAMEN M

3 patents

SOMERVELL MARK H

3 patents