Inventor
HOLLAND WAYLAND B
US8 patents
Patents
8 patentsUS5467306ANov 14, 1995
Method of using source bias to increase threshold voltages and/or to correct for over-erasure of flash eproms
TEXAS INSTRUMENTS INC160 citations98
US5596528AJan 21, 1997
Method of using source bias to raise threshold voltages and/or to compact threshold voltages
TEXAS INSTRUMENTS INC21 citations92
US5526315AJun 11, 1996
Biasing circuit and method to achieve compaction and self-limiting erase in flash EEPROMS
TEXAS INSTRUMENTS INC23 citations92
US5278458AJan 11, 1994
Threshold/voltage detection circuit
TEXAS INSTRUMENTS INC26 citations92
US5428578AJun 27, 1995
Biasing circuit and method to achieve compaction and self-limiting erase in flash EEPROMs
TEXAS INSTRUMENTS INC17 citations81
US5705404AJan 6, 1998
Method of implant verification in semiconductor device using reticle specific indicator
TEXAS INSTRUMENTS INC7 citations71
US5403753AApr 4, 1995
Method of forming implant indicators for implant verification
TEXAS INSTRUMENTS INC5 citations71
US5594258AJan 14, 1997
Semiconductor device with reticle specific implant verification indicator
TEXAS INSTRUMENTS INC2 citations60