P

Inventor

MANGOLD RICHARD P

US37 patents
⚠️ This page may combine multiple inventors who share the name “MANGOLD RICHARD P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

28 patents
US6205550B1Mar 20, 2001

Tamper resistant methods and apparatus

INTEL CORP234 citations98
US6175925B1Jan 16, 2001

Tamper resistant player for scrambled contents

INTEL CORP205 citations98
US5754869AMay 19, 1998

Method and apparatus for managing power consumption of the CPU and on-board system devices of personal computers

INTEL CORP154 citations98
US5752050AMay 12, 1998

Method and apparatus for managing power consumption of external devices for personal computers using a power management coordinator

INTEL CORP134 citations98
US7328455B2Feb 5, 2008

Apparatus and method for enabling secure content decryption within a set-top box

INTEL CORP66 citations96
US6839846B2Jan 4, 2005

Embedding digital signatures into digital payloads

INTEL CORP217 citations95
US6802003B1Oct 5, 2004

Method and apparatus for authenticating content

INTEL CORP54 citations95
US6668324B1Dec 23, 2003

System and method for safeguarding data within a device

INTEL CORP69 citations95
US6092209AJul 18, 2000

Method and apparatus for managing power consumption of peripheral devices of personal computers

INTEL CORP76 citations95
US6920221B1Jul 19, 2005

Method and apparatus for protected exchange of status and secret values between a video source application and a video hardware interface

INTEL CORP24 citations92
US6802004B1Oct 5, 2004

Method and apparatus for authenticating content in a portable device

INTEL CORP25 citations92
US7570766B2Aug 4, 2009

Transparently embedding non-compliant data in a data stream

INTEL CORP17 citations83
US9934859B1Apr 3, 2018

Determining demarcation voltage via timestamps

INTEL CORP9 citations81
US10073659B2Sep 11, 2018

Power management circuit with per activity weighting and multiple throttle down thresholds

INTEL CORP2 citations73
US9477409B2Oct 25, 2016

Accelerating boot time zeroing of memory based on non-volatile memory (NVM) technology

INTEL CORP3 citations73
US9817738B2Nov 14, 2017

Clearing poison status on read accesses to volatile memory regions allocated in non-volatile memory

INTEL CORP2 citations72
US9323664B2Apr 26, 2016

Techniques for identifying read/write access collisions for a storage medium

INTEL CORP5 citations70
US10048877B2Aug 14, 2018

Predictive memory maintenance

INTEL CORP3 citations64
US8386650B2Feb 26, 2013

Method to improve a solid state disk performance by using a programmable bus arbiter

INTEL CORP3 citations63
US10310989B2Jun 4, 2019

Time tracking with patrol scrub

INTEL CORP1 citations60
US7302589B2Nov 27, 2007

Method for securing memory mapped control registers

INTEL CORP2 citations60
US11404105B2Aug 2, 2022

Write disturb refresh rate reduction using write history buffer

INTEL CORP0 citations56
US10915254B2Feb 9, 2021

Technologies for contemporaneous access of non-volatile and volatile memory in a memory device

INTEL CORP0 citations56
US10296250B2May 21, 2019

Method and apparatus for improving performance of sequential logging in a storage device

INTEL CORP1 citations55
US7130911B2Oct 31, 2006

Method for monitoring unauthorized access to data stored in memory buffers

INTEL CORP0 citations52
US10248343B2Apr 2, 2019

Architectures and techniques for providing low-power storage mechanisms

INTEL CORP0 citations51
US10067879B2Sep 4, 2018

Apparatus and method to support a storage mode over a cache-line memory interface to a non-volatile memory dual in line memory module

INTEL CORP0 citations50
US10296238B2May 21, 2019

Technologies for contemporaneous access of non-volatile and volatile memory in a memory device

INTEL CORP0 citations46

COMPAQ COMPUTER CORP

4 patents

MANGOLD RICHARD P

2 patents

RAMAGE SIMON D

1 patent

AKERS JASON B

1 patent

TRIKA SANJEEV N

1 patent