Inventor

CHIA WEI-KUO

TW9 patents

⚠️ This page may combine multiple inventors who share the name “CHIA WEI-KUO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IND TECH RES INST

7 patents

US6057861AMay 2, 2000

Mip map/rip map texture linear addressing memory organization and address generator

IND TECH RES INST46 citations95

US5963220AOct 5, 1999

Mip map/rip map texture linear addressing memory organization and address generator

IND TECH RES INST31 citations92

US5754185AMay 19, 1998

Apparatus for blending pixels of a source object and destination plane

IND TECH RES INST62 citations92

US5745739AApr 28, 1998

Virtual coordinate to linear physical memory address converter for computer graphics system

IND TECH RES INST39 citations86

US5522021AMay 28, 1996

Word boundary parameter evaluation for bit block transfer operation in a computer graphics system

IND TECH RES INST7 citations68

US6266065B1Jul 24, 2001

Method for rendering 3D triangle primitives

IND TECH RES INST2 citations53

US5933147AAug 3, 1999

Computer graphics memory architecture which processes a full pixel of 3D color and z value data in a single I/O transaction

IND TECH RES INST0 citations31

(unassigned)

1 patent

US5924111AJul 13, 1999

Method and system for interleaving data in multiple memory bank partitions

164 citations91

ITRI IND TECHNOLOGY RESEARCH I

1 patent

US5740344AApr 14, 1998

Texture filter apparatus for computer graphics system

ITRI IND TECHNOLOGY RESEARCH I19 citations80