Inventor

EHLIG PETER N

US43 patents

Patents

43 patents

US6032268AFeb 29, 2000

Processor condition sensing circuits, systems and methods

TEXAS INSTRUMENTS INC132 citations99

US5550993AAug 27, 1996

Data processor with sets of two registers where both registers receive identical information and when context changes in one register the other register remains unchanged

TEXAS INSTRUMENTS INC103 citations99

US5535331AJul 9, 1996

Processor condition sensing circuits, systems and methods

TEXAS INSTRUMENTS INC133 citations99

US5349687ASep 20, 1994

Speech recognition system having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

TEXAS INSTRUMENTS INC168 citations99

US5319792AJun 7, 1994

Modem having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

TEXAS INSTRUMENTS INC159 citations99

US5319789AJun 7, 1994

Electromechanical apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

TEXAS INSTRUMENTS INC163 citations99

US5155812AOct 13, 1992

Devices and method for generating and using systems, software waitstates on address boundaries in data processing

TEXAS INSTRUMENTS INC212 citations99

US5142677AAug 25, 1992

Data processing device with mask and status bits for selecting a set of status conditions

TEXAS INSTRUMENTS INC19 citations96

US5946483AAug 31, 1999

Devices, systems and methods for conditional instructions

TEXAS INSTRUMENTS INC29 citations96

US5907714AMay 25, 1999

Method for pipelined data processing with conditioning instructions for controlling execution of instructions without pipeline flushing

TEXAS INSTRUMENTS INC31 citations96

US5617574AApr 1, 1997

Devices, systems and methods for conditional instructions

TEXAS INSTRUMENTS INC27 citations96

US5313648AMay 17, 1994

Signal processing apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

TEXAS INSTRUMENTS INC184 citations96

US5072418ADec 10, 1991

Series maxium/minimum function computing devices, systems and methods

TEXAS INSTRUMENTS INC270 citations94

US6996747B2Feb 7, 2006

Program counter trace stack, access port, and serial scan path

TEXAS INSTRUMENTS INC14 citations93

US6918025B2Jul 12, 2005

IC with wait state registers

TEXAS INSTRUMENTS INC12 citations93

US5652910AJul 29, 1997

Devices and systems with conditional instructions

TEXAS INSTRUMENTS INC39 citations93

US5579497ANov 26, 1996

Devices and systems with parallel logic unit, and methods

TEXAS INSTRUMENTS INC20 citations93

US5579218ANov 26, 1996

Devices and systems with parallel logic unit, and methods

TEXAS INSTRUMENTS INC29 citations93

US5829054AOct 27, 1998

Devices and systems with parallel logic unit operable on data memory locations

TEXAS INSTRUMENTS INC20 citations92

US6567910B2May 20, 2003

Digital signal processing unit with emulation circuitry and debug interrupt enable register indicating serviceable time-critical interrupts during real-time emulation mode

TEXAS INSTRUMENTS INC31 citations89

US5101498AMar 31, 1992

Pin selectable multi-mode processor

TEXAS INSTRUMENTS INC36 citations89

US6311264B1Oct 30, 2001

Digital signal processor with wait state register

TEXAS INSTRUMENTS INC9 citations82

US6263419B1Jul 17, 2001

Integrated circuit with wait state registers

TEXAS INSTRUMENTS INC10 citations82

US5109494AApr 28, 1992

Passive processor communications interface

TEXAS INSTRUMENTS INC20 citations79

US6986028B2Jan 10, 2006

Repeat block with zero cycle overhead nesting

TEXAS INSTRUMENTS INC9 citations74

US6263418B1Jul 17, 2001

Process of operating a microprocessor to use wait state numbers

TEXAS INSTRUMENTS INC6 citations74

US6249859B1Jun 19, 2001

IC with wait state registers

TEXAS INSTRUMENTS INC6 citations74

US6249860B1Jun 19, 2001

System with wait state registers

TEXAS INSTRUMENTS INC5 citations74

US6247111B1Jun 12, 2001

System with wait state register

TEXAS INSTRUMENTS INC3 citations74

US6243801B1Jun 5, 2001

System with wait state registers

TEXAS INSTRUMENTS INC5 citations74

US6240505B1May 29, 2001

System with wait state registers

TEXAS INSTRUMENTS INC5 citations74

US5828577AOct 27, 1998

Devices and systems with protective terminal configuration, and methods

TEXAS INSTRUMENTS INC7 citations74

US5586275ADec 17, 1996

Devices and systems with parallel logic unit operable on data memory locations, and methods

TEXAS INSTRUMENTS INC10 citations74

US5583767ADec 10, 1996

Devices and systems with parallel logic unit, and methods notice

TEXAS INSTRUMENTS INC9 citations74

US5551050AAug 27, 1996

System and method using synchronized processors to perform real time internal monitoring of a data processing device

TEXAS INSTRUMENTS INC16 citations74

US6768669B2Jul 27, 2004

Volatile memory cell reconfigured as a non-volatile memory cell

TEXAS INSTRUMENTS INC10 citations68

US5777885AJul 7, 1998

Devices and systems with protective terminal configuration, and methods

TEXAS INSTRUMENTS INC1 citations63

US5724248AMar 3, 1998

Devices and systems with protective terminal configuration, and methods

TEXAS INSTRUMENTS INC4 citations63

EHLIG PETER N

Patents

Processor condition sensing circuits, systems and methods

Data processor with sets of two registers where both registers receive identical information and when context changes in one register the other register remains unchanged

Processor condition sensing circuits, systems and methods

Speech recognition system having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

Modem having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

Electromechanical apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

Devices and method for generating and using systems, software waitstates on address boundaries in data processing

Context switching devices, systems and methods

Microphone/speaker system with context switching in processor

Data processing device and method of operation with context switching

Processor condition sensing circuits, systems and methods

DSP with wait state registers having at least two portions

Data processing device with mask and status bits for selecting a set of status conditions

Devices, systems and methods for conditional instructions

Method for pipelined data processing with conditioning instructions for controlling execution of instructions without pipeline flushing

Devices, systems and methods for conditional instructions

Signal processing apparatus having first and second registers enabling both to concurrently receive identical information in one context and disabling one to retain the information in a next context

Series maxium/minimum function computing devices, systems and methods

Program counter trace stack, access port, and serial scan path

IC with wait state registers

Devices and systems with conditional instructions

Devices and systems with parallel logic unit, and methods

Devices and systems with parallel logic unit, and methods

Devices and systems with parallel logic unit operable on data memory locations

Digital signal processing unit with emulation circuitry and debug interrupt enable register indicating serviceable time-critical interrupts during real-time emulation mode

Pin selectable multi-mode processor

Digital signal processor with wait state register

Integrated circuit with wait state registers

Passive processor communications interface

Repeat block with zero cycle overhead nesting

Process of operating a microprocessor to use wait state numbers

IC with wait state registers

System with wait state registers

System with wait state register

System with wait state registers

System with wait state registers

Devices and systems with protective terminal configuration, and methods

Devices and systems with parallel logic unit operable on data memory locations, and methods

Devices and systems with parallel logic unit, and methods notice

System and method using synchronized processors to perform real time internal monitoring of a data processing device

Volatile memory cell reconfigured as a non-volatile memory cell

Devices and systems with protective terminal configuration, and methods

Devices and systems with protective terminal configuration, and methods