Inventor

JOST MARK E

US34 patents

⚠️ This page may combine multiple inventors who share the name “JOST MARK E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JOST MARK E

MICRON TECHNOLOGY INC

Method of forming wafer alignment patterns

Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material

Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns

Semiconductor processing for forming capacitors by etching polysilicon and coating layer formed over the polysilicon

Semiconductor processing methods of forming a contact opening to a semiconductor substrate

Semiconductor wafer, wafer alignment patterns

Chemical vapor deposition methods

Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns

Method of removing surface defects or other recesses during the formation of a semiconductor device

Methods for utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Semiconductor wafer,wafer alignment patterns and method of forming wafer alignment patterns

Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material

Semiconductor processing methods, and methods of forming capacitors

Semiconductor processing method of making electrical contact to a node received within a mass of insulating dielectric material

Semiconductor processing methods of forming a contact opening to a semiconductor substrate

Method of forming recessed container cells

Method of forming wafer alignment patterns

Interconnect structures with interlayer dielectric

Methods of etching a contact opening over a node location on a semiconductor substrate

Method of etching a contact opening

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Method of removing surface defects or other recesses during the formation of a semiconductor device

Method of removing surface defects or other recesses during the formation of a semiconductor device

Methods of forming semiconductor structures

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Methods of forming protective segments of material, and etch stops

Methods of forming protective segments of material, and etch stops

Dry etching process to form a conductive layer within an opening without use of a mask during the formation of a semiconductor device

IBM

High performance vertical bipolar transistor structure via self-aligning processing techniques

Method of forming a BiCMOS SOI wafer having thin and thick SOI regions of silicon

Roughened sidewall ridge for high power fundamental mode semiconductor ridge waveguide laser operation

Protection means for ridge waveguide laser structures using thick organic films

(unassigned)

Semiconductor wafer, wafer alignment patterns and method of forming wafer alignment patterns