Inventor
HOCHSCHILD PETER H
US28 patents
⚠️ This page may combine multiple inventors who share the name “HOCHSCHILD PETER H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
27 patentsUS5546391AAug 13, 1996
Central shared queue based time multiplexed packet switch with deadlock avoidance
IBM99 citations96
US8345816B1Jan 1, 2013
RAM-based event counters using transposition
IBM17 citations92
US7996593B2Aug 9, 2011
Interrupt handling using simultaneous multi-threading
IBM22 citations92
US7813369B2Oct 12, 2010
Half RDMA and half FIFO operations
IBM44 citations92
US7634642B2Dec 15, 2009
Mechanism to save and restore cache and translation trace for fast context switch
IBM23 citations92
US7493436B2Feb 17, 2009
Interrupt handling using simultaneous multi-threading
IBM22 citations92
US5600822AFeb 4, 1997
Resource allocation synchronization in a parallel processing system
IBM20 citations92
US5566342AOct 15, 1996
Scalable switch wiring technique for large arrays of processors
IBM37 citations92
US5371735ADec 6, 1994
Communication network with non-unique device identifiers and method of establishing connection paths in such a network
IBM20 citations92
US6961782B1Nov 1, 2005
Methods for routing packets on a linear array of processors
IBM38 citations91
US5371733ADec 6, 1994
Method and apparatus for centralized determination of virtual transmission delays in networks of counter-synchronized communication devices
IBM39 citations91
US5448558ASep 5, 1995
Method and apparatus for managing packet FIFOS
IBM42 citations90
US4914612AApr 3, 1990
Massively distributed simulation engine
IBM104 citations90
US7506132B2Mar 17, 2009
Validity of address ranges used in semi-synchronous memory copy operations
IBM12 citations84
US7484062B2Jan 27, 2009
Cache injection semi-synchronous memory copy operation
IBM12 citations84
US8023417B2Sep 20, 2011
Failover mechanisms in RDMA operations
IBM17 citations83
US7454585B2Nov 18, 2008
Efficient and flexible memory copy operation
IBM7 citations74
US7882321B2Feb 1, 2011
Validity of address ranges used in semi-synchronous memory copy operations
IBM3 citations63
US7523260B2Apr 21, 2009
Propagating data using mirrored lock caches
IBM6 citations63
US5414740AMay 9, 1995
Synchronous communication system having multiplexed information transfer and transition phases
IBM3 citations61
US5414832AMay 9, 1995
Tunable synchronous electronic communication apparatus
IBM4 citations61
US8364849B2Jan 29, 2013
Snapshot interface operations
IBM2 citations60
US7619993B2Nov 17, 2009
Efficient probabilistic duplicate packet detector in computer networks
IBM3 citations60
US7890703B2Feb 15, 2011
Cache injection using semi-synchronous memory copy operation
IBM1 citations52
US8693615B2Apr 8, 2014
RAM-based event counters using transposition
IBM1 citations51
US8031639B2Oct 4, 2011
Efficient probabilistic duplicate packet detector in computer networks
IBM0 citations51
US7477608B2Jan 13, 2009
Methods for routing packets on a linear array of processors
IBM0 citations51