Inventor · disambiguated record
Prashant S. Damle
Also filed as: DAMLE PRASHANT · DAMLE PRASHANT S
32 granted patents·6 pending applications·182 citations·filing 2009–2022
97Inventor score
Top patents by PatentIndex Score
38 records- 0197US9824767B1Methods and apparatus to reduce threshold voltage driftINTEL CORP·Filed 2016·Granted Nov 21, 2017·25 cites·27 claims
- 0294US9613691B2Apparatus and method for drift cancellation in a memoryINTEL CORP·Filed 2015·Granted Apr 4, 2017·20 cites·20 claims
- 0390US9286975B2Mitigating read disturb in a cross-point memoryINTEL CORP·Filed 2014·Granted Mar 15, 2016·18 cites·12 claims
- 0489US10324793B2Reduced uncorrectable memory errorsINTEL CORP·Filed 2018·Granted Jun 18, 2019·4 cites·22 claims
- 0589US9136873B2Reduced uncorrectable memory errorsINTEL CORP·Filed 2013·Granted Sep 15, 2015·8 cites·25 claims
- 0688US9202547B2Managing disturbance induced errorsINTEL CORP·Filed 2013·Granted Dec 1, 2015·8 cites·18 claims
- 0788US9032137B2Flexible wear management for non-volatile memoryINTEL CORP·Filed 2012·Granted May 12, 2015·11 cites·20 claims
- 0887US9934859B1Determining demarcation voltage via timestampsINTEL CORP·Filed 2016·Granted Apr 3, 2018·9 cites·24 claims
- 0986US9721657B1Managing threshold voltage shift in nonvolatile memoryINTEL CORP·Filed 2016·Granted Aug 1, 2017·6 cites·26 claims
- 1085US10331345B2Method and apparatus for reducing silent data errors in non-volatile memory systemsINTEL CORP·Filed 2017·Granted Jun 25, 2019·4 cites·24 claims
- 1183US9619324B2Error correction in non—volatile memoryINTEL CORP·Filed 2013·Granted Apr 11, 2017·6 cites·25 claims
- 1283US9384801B2Threshold voltage expansionINTEL CORP·Filed 2014·Granted Jul 5, 2016·8 cites·22 claims
- 1382US10679698B2Memory preset adjustment based on adaptive calibrationINTEL CORP·Filed 2018·Granted Jun 9, 2020·5 cites·23 claims
- 1481US8174893B2Independent well bias management in a memory deviceGODA AKIRA·Filed 2009·Granted May 8, 2012·10 cites·32 claims
- 1580US8705290B2Memory device having improved programming operationDAMLE PRASHANT S·Filed 2012·Granted Apr 22, 2014·6 cites·20 claims
- 1679US9368205B2Set and reset operation in phase change memory and associated techniques and configurationsINTEL CORP·Filed 2013·Granted Jun 14, 2016·6 cites·12 claims
- 1776US9030906B2Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cellRIVERS DOYLE·Filed 2012·Granted May 12, 2015·7 cites·17 claims
- 1876US7990772B2Memory device having improved programming operationMICRON TECHNOLOGY INC·Filed 2009·Granted Aug 2, 2011·7 cites·14 claims
- 1973US9934088B2Reduced uncorrectable memory errorsINTEL CORP·Filed 2015·Granted Apr 3, 2018·2 cites·30 claims
- 2073US9613698B2Set and reset operation in phase change memory and associated techniques and configurationsINTEL CORP·Filed 2016·Granted Apr 4, 2017·3 cites·15 claims
- 2171US9792963B2Managing disturbance induced errorsINTEL CORP·Filed 2015·Granted Oct 17, 2017·2 cites·22 claims
- 2270US10310989B2Time tracking with patrol scrubINTEL CORP·Filed 2017·Granted Jun 4, 2019·1 cites·24 claims
- 2365US10777271B2Method and apparatus for adjusting demarcation voltages based on cycle count metricsINTEL CORP·Filed 2017·Granted Sep 15, 2020·2 cites·24 claims
- 2462US10056139B2Managing threshold voltage shift in nonvolatile memoryINTEL CORP·Filed 2017·Granted Aug 21, 2018·1 cites·19 claims
- 2557US10936418B2Reduced uncorrectable memory errorsINTEL CORP·Filed 2019·Granted Mar 2, 2021·0 cites·20 claims
- 2654US8331160B2Memory device having improved programming operationDAMLE PRASHANT S·Filed 2011·Granted Dec 11, 2012·1 cites·22 claims
- 2753US7920419B2Isolated P-well architecture for a memory deviceINTEL CORP·Filed 2009·Granted Apr 5, 2011·2 cites·15 claims
- 2851US9501405B2Flexible wear management for non-volatile memoryINTEL CORP·Filed 2015·Granted Nov 22, 2016·0 cites·25 claims
- 2950US10153015B2Managing disturbance induced errorsINTEL CORP·Filed 2017·Granted Dec 11, 2018·0 cites·28 claims
- 3048US12230346B2Cross-point memory read technique to mitigate drift errorsINTEL CORP·Filed 2021·Granted Feb 18, 2025·0 cites·20 claims
- 3147US11404105B2Write disturb refresh rate reduction using write history bufferINTEL CORP·Filed 2020·Granted Aug 2, 2022·0 cites·20 claims
- 3245US8498159B2Independent well bias management in a memory deviceGODA AKIRA·Filed 2012·Granted Jul 30, 2013·0 cites·20 claims
- 3343US2022382465A1Velocity based write disturb refreshINTEL CORP·Filed 2022·Application pending·0 cites
- 3439US2022359030A1Adaptive write current adjustment for persistent memoriesINTEL CORP·Filed 2022·Application pending·0 cites
- 3539US2022383941A1Dynamic write selection for shelf-life retention in non-volatile memoriesINTEL CORP·Filed 2022·Application pending·0 cites
- 3638US2020159424A1Techniques to access non-volatile memory using deck offsetINTEL CORP·Filed 2020·Application pending·0 cites
- 3733US2014089561A1Techniques Associated with Protecting System Critical Data Written to Non-Volatile MemoryPANGAL KIRAN·Filed 2012·Application pending·0 cites
- 3831US2021193248A1Near miss-based refresh for read disturb mitigationINTEL CORP·Filed 2020·Application pending·0 cites
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