Inventor

LIN CHI-SHUN

US39 patents

⚠️ This page may combine multiple inventors who share the name “LIN CHI-SHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN CHI-SHUN

WINBOND ELECTRONICS CORP

Physical unclonable function code providing apparatus and providing method thereof

Data write method and memory storage device using the same

Resistive random access memory apparatus with forward and reverse reading modes

Physical unclonable function code generating method and providing apparatus thereof

Syndrome decoder circuit

In-memory computing apparatus and computing method having a memory array includes a shifted weight storage, shift information storage and shift restoration circuit to restore a weigh shifted amount of shifted sum-of-products to generate multiple restored sum-of-products

RRAM with plurality of 1TnR structures

Memory device having parameter adjusting mechanism and method of adjusting parameter by memory device

NVFF monotonic counter and method of implementing same

Data read method and memory storage device using the same

Methods and systems for detecting and correcting errors in nonvolatile memory

Non-volatile memory device

Resistive memory with self-termination control function and self-termination control method

Apparatus for providing adjustable reference voltage for sensing read-out data for memory

Resistive memory

Monotonic counter memory system

Resistive memory apparatus

Resistive memory

Integrated circuit and interface control circuit thereof

Memory storage apparatus with dynamic data repair mechanism and method of dynamic data repair thereof

Encoding method and memory storage apparatus using the same

Error correction code memory device and codeword accessing method thereof

Memory apparatus having hierarchical error correction code layer

Memory device and method for assiting read operation

Operating method of resistive memory element

Memory storage device and data access method

Non-volatile memory and write cycle recording device thereof

Memory structure with marker bit and operation method thereof

Memory system includes a memory controller coupled to a non-volatile memory array configured to provide special write operation to write data in the non-volatile memory array before a board mount operation is applied and provde a regular write operation after a board mount operation is applied

Methods and systems for nonvolatile memory data management

Methods and systems for nonvolatile memory data management

Memory device with error correction code

Memory device and multi physical cells error correction method thereof

Memory apparatus and data accessing method thereof

Encoding method and memory storage apparatus using the same

Encoding method and a memory storage apparatus using the same

Option code providing circuit and providing method thereof

Programmable array logic circuit and operating method thereof

LIN CHI-SHUN

Reference cell circuit and method of producing a reference current