Inventor

VEZYRTZIS CHRISTOS

US23 patents

⚠️ This page may combine multiple inventors who share the name “VEZYRTZIS CHRISTOS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VEZYRTZIS CHRISTOS

IBM

On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core

Proactive voltage droop reduction and/or mitigation in a processor core

Mitigation of on-chip supply voltage based on local and non-local (neighboring) cores&#39; supply voltage information and decision

Simultaneously measuring degradation in multiple FETs

Proactive voltage droop reduction and/or mitigation in a processor core

Pulse-drive resonant clock with on-the-fly mode change

Pulse-drive resonant clock with on-the-fly mode change

Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensors

Proactive voltage droop reduction and/or mitigation in a processor core

On-chip supply noise voltage reduction or mitigation using local detection loops

On-chip supply noise voltage reduction or mitigation using local detection loops

Mitigation of on-chip supply voltage noise by monitoring slope of supply voltage based on time-based sensors

Increasing resolution of on-chip timing uncertainty measurements

On-chip supply noise voltage reduction or mitigation using local detection loops in a processor core

Test structure to measure delay variability mismatch of digital logic paths

Determining clock signal quality using a plurality of sensors

Determining clock signal quality using a plurality of sensors

Increasing the resolution of on-chip measurement circuits

BITMAIN DEV INC

Systems and methods for concurrently driving clock pulse and clock pulse complement signals in latches of an application-specific integrated circuit

Dynamic pulse generator with small propagation delay

Circuit structure to measure outliers of process variation effects

Sequential elements with programmable feedback to program leakage in ASICs

VEZYRTZIS CHRISTOS

Apparatus and methods for processing a signal using a fixed-point operation

Mitigation of on-chip supply voltage based on local and non-local (neighboring) cores' supply voltage information and decision