Inventor
FUTASE TAKUYA
JP37 patents
⚠️ This page may combine multiple inventors who share the name “FUTASE TAKUYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RENESAS ELECTRONICS CORP
9 patentsUS7994049B2Aug 9, 2011
Manufacturing method of semiconductor device including filling a connecting hole with metal film
RENESAS ELECTRONICS CORP11 citations84
US7923319B2Apr 12, 2011
Method for manufacturing a semiconductor integrated circuit device circuit device
RENESAS ELECTRONICS CORP15 citations83
US7964500B2Jun 21, 2011
Method of manufacturing semiconductor integrated circuit device
RENESAS ELECTRONICS CORP4 citations63
US8034717B2Oct 11, 2011
Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device
RENESAS ELECTRONICS CORP2 citations61
US7964509B2Jun 21, 2011
Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device
RENESAS ELECTRONICS CORP2 citations61
US7955925B2Jun 7, 2011
Method of manufacturing semiconductor device
RENESAS ELECTRONICS CORP5 citations61
US8039378B2Oct 18, 2011
Method of manufacturing a semiconductor device
RENESAS ELECTRONICS CORP1 citations51
US8021979B2Sep 20, 2011
Method of manufacturing semiconductor device
RENESAS ELECTRONICS CORP0 citations51
US7851355B2Dec 14, 2010
Method of manufacturing semiconductor device
RENESAS ELECTRONICS CORP1 citations51
SANDISK TECHNOLOGIES INC
8 patentsUS9401305B2Jul 26, 2016
Air gaps structures for damascene metal patterning
SANDISK TECHNOLOGIES INC7 citations83
US9177853B1Nov 3, 2015
Barrier layer stack for bit line air gap formation
SANDISK TECHNOLOGIES INC9 citations83
US9524904B2Dec 20, 2016
Early bit line air gap formation
SANDISK TECHNOLOGIES INC12 citations80
US9391081B1Jul 12, 2016
Metal indentation to increase inter-metal breakdown voltage
SANDISK TECHNOLOGIES INC4 citations71
US9466523B2Oct 11, 2016
Contact hole collimation using etch-resistant walls
SANDISK TECHNOLOGIES INC2 citations60
US9607997B1Mar 28, 2017
Metal line with increased inter-metal breakdown voltage
SANDISK TECHNOLOGIES INC0 citations50
US9245898B2Jan 26, 2016
NAND flash memory integrated circuits and processes with controlled gate height
SANDISK TECHNOLOGIES INC1 citations50
US9478461B2Oct 25, 2016
Conductive line structure with openings
SANDISK TECHNOLOGIES INC0 citations49
SANDISK TECHNOLOGIES LLC
4 patentsUS10297312B1May 21, 2019
Resistive memory cell programmed by metal alloy formation and method of operating thereof
SANDISK TECHNOLOGIES LLC8 citations84
US9847249B2Dec 19, 2017
Buried etch stop layer for damascene bit line formation
SANDISK TECHNOLOGIES LLC5 citations72
US9799527B2Oct 24, 2017
Double trench isolation
SANDISK TECHNOLOGIES LLC3 citations72
US9768183B2Sep 19, 2017
Source line formation and structure
SANDISK TECHNOLOGIES LLC2 citations70
FUTASE TAKUYA
4 patentsUS8293648B2Oct 23, 2012
Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device
FUTASE TAKUYA4 citations71
US8110457B2Feb 7, 2012
Method of manufacturing semiconductor device
FUTASE TAKUYA5 citations61
US8268682B2Sep 18, 2012
Method for manufacturing a semiconductor integrated circuit device
FUTASE TAKUYA2 citations60
US8222133B2Jul 17, 2012
Manufacturing method of semiconductor device
FUTASE TAKUYA0 citations51
WESTERN DIGITAL TECH INC
4 patentsUS11721392B2Aug 8, 2023
Low resistance monosilicide electrode for phase change memory and methods of making the same
WESTERN DIGITAL TECH INC0 citations62
US11114157B1Sep 7, 2021
Low resistance monosilicide electrode for phase change memory and methods of making the same
WESTERN DIGITAL TECH INC0 citations62
US11758831B2Sep 12, 2023
Low resistance multi-layer electrode for phase change memory and methods of making the same
WESTERN DIGITAL TECH INC0 citations52
US11424292B2Aug 23, 2022
Memory array containing capped aluminum access lines and method of making the same
WESTERN DIGITAL TECH INC0 citations52
RENESAS TECH CORP
3 patentsUS6737221B2May 18, 2004
Mass production method of semiconductor integrated circuit device and manufacturing method of electronic device
RENESAS TECH CORP33 citations94
US7700448B2Apr 20, 2010
Manufacturing method of semiconductor device
RENESAS TECH CORP6 citations61
US7566662B2Jul 28, 2009
Method of dry cleaning silicon surface prior to forming self-aligned nickel silicide layer
RENESAS TECH CORP4 citations61