Inventor

TAKEGUCHI NAOKI

JP31 patents

⚠️ This page may combine multiple inventors who share the name “TAKEGUCHI NAOKI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAKEGUCHI NAOKI

SANDISK TECHNOLOGIES LLC

Method of operating memory array having divided apart bit lines and partially divided bit line selector switches

Three-dimensional memory device containing replacement contact via structures and method of making the same

Method of fabricating memory array having divided apart bit lines and partially divided bit line selector switches

Selective tungsten growth for word lines of a three-dimensional memory device

Three-dimensional memory device including electrically conductive layers with molybdenum-containing liners

Vertical thin film transistors in non-volatile storage systems

Three-dimensional memory device and method of making thereof using double pitch word line formation

Methods and apparatuses for forming semiconductor devices containing tungsten layers using a tungsten growth suppressant

Fluorine-free tungsten deposition process employing in-situ oxidation and apparatuses for effecting the same

Three dimensional memory device and method of making thereof by forming channel and memory film after word line replacement

Methods and apparatuses for forming semiconductor devices containing tungsten layers using a tungsten growth suppressant

Three-dimensional memory device and method of making thereof using double pitch word line formation

Three-dimensional memory device and method of making thereof using double pitch word line formation

Three dimensional memory device and method of making thereof by forming channel and memory film after word line replacement

SANDISK TECHNOLOGIES INC

Floating gate ultrahigh density vertical NAND flash memory

Three dimensional memory device having comb-shaped source electrode and methods of making thereof

Cobalt-containing conductive layers for control gate electrodes in a memory structure

Set of stepped surfaces formation for a multilevel interconnect structure

Blocking oxide in memory opening integration scheme for three-dimensional memory structure

Transistor gate and process for making transistor gate

Air gap formation between bit lines with side protection

Air gap formation between bit lines with top protection

TAKEGUCHI NAOKI

Ultraviolet blocking structure and method for semiconductor device

Method for forming metal wire

Electroplating apparatus and method with uniformity improvement

SANDISK 3D LLC

Memory array having divided apart bit lines and partially divided bit line selector switches

Vertical thin film transistors in non-volatile storage systems

FUJITSU LTD

Magnetic thin film, magnetic thin film forming method, and recording head

PANASONIC IP MAN CO LTD

LED lighting device and luminaire

HIGASHI MASAHIKO

Methods and structures for discharging plasma formed during the fabrication of semiconductor device

SPANSION LLC

Plasma treated metal silicide layer formation