Inventor

SAENGER KATHERINE LYNN

US52 patents

⚠️ This page may combine multiple inventors who share the name “SAENGER KATHERINE LYNN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAENGER KATHERINE LYNN

IBM

Fin field effect transistor devices with self-aligned source and drain regions

Nanowire field-effect transistors

Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder material

Dual damascene processing for semiconductor chip interconnects

Dual damascene processing for semiconductor chip interconnects

Method and material for integration of fuorine-containing low-k dielectrics

Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same

Scalable MOS field effect transistor

Structure and fabrication method for stackable, air-gap-containing low epsilon dielectric layers

Plating of noble metal electrodes for DRAM and FRAM

Multilayer interconnect structure containing air gaps and method for making

Chip interconnect wiring structure with low dielectric constant insulator and methods for fabricating the same

Method for selective extraction of sacrificial place-holding material used in fabrication of air gap-containing interconnect structures

Multilayer ferroelectric capacitor structure

Multilevel interconnect structure containing air gaps and method for making

Compound electrode stack capacitor

Enhanced T-gate structure for modulation doped field effect transistors

Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation

Stabilization of low-k carbon-based dielectrics

Structure and fabrication method for stackable, air-gap-containing low epsilon dielectric layers

Multilayer interconnect structure containing air gaps and method for making

Enhanced T-gate structure for modulation doped field effect transistors

Stabilization of fluorine-containing low-k dielectrics in a metal/insulator wiring structure by ultraviolet irradiation

Method for fabricating a dual-diameter electrical conductor

Feram cell with internal oxygen source and method of oxygen release

Flip FERAM cell and method to form same

Capacitor formed with Pt electrodes having a 3D cup-like shape with roughened inner and outer surfaces

Compound electrode stack capacitor

Method, materials, and structures for noble metal electrode contacts to silicon

Isolated sidewall capacitor

Method for making an isolated sidewall capacitor having a compound plate electrode

Structure and fabrication method for non-planar memory elements

Method and materials for through-mask electroplating and selective base removal

Reduced parasitic resistance and capacitance field effect transistor

Structure and fabrication method for non-planar memory elements

High dielectric constant material deposition to achieve high capacitance

Fin field effect transistor devices with self-aligned source and drain regions

Method for fabricating low-defect-density changed orientation Si

Flip FERAM cell and method to form same

Scalable MOS field effect transistor

Flip FERAM cell and method to form same

Isolated sidewall capacitor

Sidewall capacitor with L-shaped dielectric

Method and materials for through-mask electroplating and selective base removal

Flip FERAM cell and method to form same

Flip FERAM cell and method to form same

Sidewall capacitor with L-shaped dielectric

Flip FERAM cell and method to form same

INTERNAT BUSINESS MACHIENS COR

Techniques for fabricating nanowire field-effect transistors

CHANG JOSEPHINE B

Fin field effect transistor devices with self-aligned source and drain regions