Inventor
METZLER DOMINIK
US27 patents
⚠️ This page may combine multiple inventors who share the name “METZLER DOMINIK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
24 patentsUS11223008B2Jan 11, 2022
Pillar-based memory hardmask smoothing and stress reduction
IBM6 citations86
US10534276B1Jan 14, 2020
Lithographic photomask alignment using non-planar alignment structures formed on wafer
IBM11 citations86
US10685879B1Jun 16, 2020
Lithographic alignment of a conductive line to a via
IBM8 citations84
US11923246B2Mar 5, 2024
Via CD controllable top via structure
IBM4 citations75
US11227892B2Jan 18, 2022
MRAM integration with BEOL interconnect including top via
IBM2 citations73
US12593668B2Mar 31, 2026
Shallow and deep contacts with stitching
IBM0 citations62
US12550420B2Feb 10, 2026
Top contact structures for stacked transistors
IBM0 citations62
US12020949B2Jun 25, 2024
Subtractive patterning of interconnect structures
IBM0 citations62
US11830807B2Nov 28, 2023
Placing top vias at line ends by selective growth of via mask from line cut dielectric
IBM0 citations62
US11812668B2Nov 7, 2023
Pillar-based memory hardmask smoothing and stress reduction
IBM0 citations62
US11404317B2Aug 2, 2022
Method for fabricating a semiconductor device including self-aligned top via formation at line ends
IBM0 citations62
US11189561B2Nov 30, 2021
Placing top vias at line ends by selective growth of via mask from line cut dielectric
IBM0 citations62
US11133260B2Sep 28, 2021
Self-aligned top via
IBM0 citations62
US11094590B1Aug 17, 2021
Structurally stable self-aligned subtractive vias
IBM0 citations62
US11688636B2Jun 27, 2023
Spin on scaffold film for forming topvia
IBM0 citations61
US11244907B2Feb 8, 2022
Metal surface preparation for increased alignment contrast
IBM0 citations61
US12243771B2Mar 4, 2025
Selective patterning of vias with hardmasks
IBM0 citations60
US11276607B2Mar 15, 2022
Selective patterning of vias with hardmasks
IBM0 citations60
US12277960B2Apr 15, 2025
Modified top electrode contact for MRAM embedding in advanced logic nodes
IBM0 citations52
US11205678B2Dec 21, 2021
Embedded MRAM device with top via
IBM0 citations52
US11152261B2Oct 19, 2021
Self-aligned top via formation at line ends
IBM0 citations52
US11189527B2Nov 30, 2021
Self-aligned top vias over metal lines formed by a damascene process
IBM0 citations51
US11189783B2Nov 30, 2021
Embedded MRAM device formation with self-aligned dielectric cap
IBM0 citations51
US10879190B2Dec 29, 2020
Patterning integration scheme with trench alignment marks
IBM0 citations42