Inventor
KAJA SURYANARAYANA
US26 patents
⚠️ This page may combine multiple inventors who share the name “KAJA SURYANARAYANA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
23 patentsUS5549808AAug 27, 1996
Method for forming capped copper electrical interconnects
IBM113 citations98
US5380560AJan 10, 1995
Palladium sulfate solution for the selective seeding of the metal interconnections on polyimide dielectrics for electroless metal deposition
IBM327 citations98
US5898222AApr 27, 1999
Capped copper electrical interconnects
IBM95 citations96
US5545927AAug 13, 1996
Capped copper electrical interconnects
IBM50 citations96
US5382447AJan 17, 1995
Process for fabricating improved multilayer interconnect systems
IBM49 citations96
US6329609B1Dec 11, 2001
Method and structure to prevent distortion and expansion of organic spacer layer for thin film transfer-join technology
IBM64 citations94
US6271111B1Aug 7, 2001
High density pluggable connector array and process thereof
IBM19 citations92
US5705857AJan 6, 1998
Capped copper electrical interconnects
IBM20 citations91
US5787578AAug 4, 1998
Method of selectively depositing a metallic layer on a ceramic substrate
IBM31 citations90
US6126761AOct 3, 2000
Process of controlling grain growth in metal films
IBM29 citations89
US6669833B2Dec 30, 2003
Process and apparatus for electroplating microscopic features uniformly across a large substrate
IBM20 citations88
US6131796AOct 17, 2000
Direct brazing of refractory metal features
IBM16 citations83
US5453642ASep 26, 1995
Multilayer interconnect systems
IBM11 citations74
US6077405AJun 20, 2000
Method and apparatus for making electrical contact to a substrate during electroplating
IBM11 citations71
US6048741AApr 11, 2000
Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices
IBM6 citations71
US5935404AAug 10, 1999
Method of performing processes on features with electricity
IBM7 citations71
US5483105AJan 9, 1996
Module input-output pad having stepped set-back
IBM5 citations62
US6638374B2Oct 28, 2003
Device produced by a process of controlling grain growth in metal films
IBM2 citations61
US6361627B1Mar 26, 2002
Process of controlling grain growth in metal films
IBM2 citations61
US6455331B2Sep 24, 2002
Process of top-surface-metallurgy plate-up bonding and rewiring for multilayer devices
IBM3 citations60
US6248599B1Jun 19, 2001
Top-surface-metallurgy plate-up bonding and rewiring for multilayer devices
IBM2 citations60
US5985128ANov 16, 1999
Method of performing processes on features with electricity
IBM2 citations60
US6241868B1Jun 5, 2001
Method for electroplating a film onto a substrate
IBM0 citations49