P

Inventor

PENG KUO-REAY

TW25 patents

Patents

25 patents
US6614693B1Sep 2, 2003

Combination erase waveform to reduce oxide trapping centers generation rate of flash EEPROM

TAIWAN SEMICONDUCTOR MFG77 citations98
US6329234B1Dec 11, 2001

Copper process compatible CMOS metal-insulator-metal capacitor structure and its process flow

TAIWAN SEMICONDUCTOR MFG212 citations98
US6122201ASep 19, 2000

Clipped sine wave channel erase method to reduce oxide trapping charge generation rate of flash EEPROM

TAIWAN SEMICONDUCTOR MFG79 citations96
US6055183AApr 25, 2000

Erase method of flash EEPROM by using snapback characteristic

TAIWAN SEMICONDUCTOR MFG54 citations96
US6049486AApr 11, 2000

Triple mode erase scheme for improving flash EEPROM cell threshold voltage (VT) cycling closure effect

TAIWAN SEMICONDUCTOR MFG57 citations96
US6472721B2Oct 29, 2002

Dual damascene interconnect structures that include radio frequency capacitors and inductors

TAIWAN SEMICONDUCTOR MFG60 citations95
US5862078AJan 19, 1999

Mixed mode erase method to improve flash eeprom write/erase threshold closure

TAIWAN SEMICONDUCTOR MFG56 citations95
US5828605AOct 27, 1998

Snapback reduces the electron and hole trapping in the tunneling oxide of flash EEPROM

TAIWAN SEMICONDUCTOR MFG95 citations95
US6645820B1Nov 11, 2003

Polycrystalline silicon diode string for ESD protection of different power supply connections

TAIWAN SEMICONDUCTOR MFG50 citations93
US6610262B1Aug 26, 2003

Depletion mode SCR for low capacitance ESD input protection

TAIWAN SEMICONDUCTOR MFG46 citations93
US6049484AApr 11, 2000

Erase method to improve flash EEPROM endurance by combining high voltage source erase and negative gate erase

TAIWAN SEMICONDUCTOR MFG43 citations92
US5949717ASep 7, 1999

Method to improve flash EEPROM cell write/erase threshold voltage closure

TAIWAN SEMICONDUCTOR MFG41 citations92
US5903499AMay 11, 1999

Method to erase a flash EEPROM using negative gate source erase followed by a high negative gate erase

TAIWAN SEMICONDUCTOR MFG21 citations92
US5838618ANov 17, 1998

Bi-modal erase method for eliminating cycling-induced flash EEPROM cell write/erase threshold closure

TAIWAN SEMICONDUCTOR MFG23 citations92
US5726933AMar 10, 1998

Clipped sine shaped waveform to reduce the cycling-induced electron trapping in the tunneling oxide of flash EEPROM

TAIWAN SEMICONDUCTOR MFG43 citations92
US5913122AJun 15, 1999

Method of making high breakdown voltage twin well device with source/drain regions widely spaced from FOX regions

TAIWAN SEMICONDUCTOR MFG27 citations91
US6661060B2Dec 9, 2003

Low capacitance ESD protection device

TAIWAN SEMICONDUCTOR MFG20 citations90
US6448123B1Sep 10, 2002

Low capacitance ESD protection device

TAIWAN SEMICONDUCTOR MFG27 citations90
US6876041B2Apr 5, 2005

ESD protection component

TAIWAN SEMICONDUCTOR MFG15 citations84
US6881996B2Apr 19, 2005

Metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer

TAIWAN SEMICONDUCTOR MFG15 citations83
US5950087ASep 7, 1999

Method to make self-aligned source etching available in split-gate flash

TAIWAN SEMICONDUCTOR MFG20 citations82
US6812088B1Nov 2, 2004

Method for making a new metal-insulator-metal (MIM) capacitor structure in copper-CMOS circuits using a pad protect layer

TAIWAN SEMICONDUCTOR MFG11 citations73
US6667217B1Dec 23, 2003

Method of fabricating a damascene copper inductor structure using a sub-0.18 um CMOS process

TAIWAN SEMICONDUCTOR MFG12 citations73
US6303454B1Oct 16, 2001

Process for a snap-back flash EEPROM cell

TAIWAN SEMICONDUCTOR MFG14 citations73
US6025628AFeb 15, 2000

High breakdown voltage twin well device with source/drain regions widely spaced from fox regions

TAIWAN SEMICONDUCTOR MFG10 citations72