Inventor
GUARINI KATHRYN W
US21 patents
Patents
21 patentsUS7723207B2May 25, 2010
Three dimensional integrated circuit and method of design
IBM277 citations99
US7329923B2Feb 12, 2008
High-performance CMOS devices on hybrid crystal oriented substrates
IBM138 citations99
US7312487B2Dec 25, 2007
Three dimensional integrated circuit
IBM335 citations99
US6830962B1Dec 14, 2004
Self-aligned SOI with different crystal orientation using wafer bonding and SIMOX processes
IBM134 citations99
US6821826B1Nov 23, 2004
Three dimensional CMOS integrated circuits having device layers built on different crystal oriented wafers
IBM391 citations99
US7244958B2Jul 17, 2007
Integration of strained Ge into advanced CMOS technology
IBM82 citations98
US6506660B2Jan 14, 2003
Semiconductor with nanoscale features
IBM101 citations97
US6911375B2Jun 28, 2005
Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
IBM64 citations96
US6358813B1Mar 19, 2002
Method for increasing the capacitance of a semiconductor capacitors
IBM56 citations96
US7453123B2Nov 18, 2008
Self-aligned planar double-gate transistor structure
IBM15 citations92
US7205185B2Apr 17, 2007
Self-aligned planar double-gate process by self-aligned oxidation
IBM26 citations92
US7387925B2Jun 17, 2008
Integration of strained Ge into advanced CMOS technology
IBM12 citations84
US7187059B2Mar 6, 2007
Compressive SiGe <110> growth and structure of MOSFET devices
IBM11 citations81
US7138683B2Nov 21, 2006
Self-aligned SOI with different crystal orientation using WAFER bonding and SIMOX processes
IBM6 citations74
US7074707B2Jul 11, 2006
Method of fabricating a connection device
IBM6 citations74
US6803266B2Oct 12, 2004
Process for passivating the semiconductor-dielectric interface of a MOS device and MOS device formed thereby
IBM9 citations72
US6603181B2Aug 5, 2003
MOS device having a passivated semiconductor-dielectric interface
IBM9 citations72
US7790538B2Sep 7, 2010
Integration of strained Ge into advanced CMOS technology
IBM4 citations63
US7713807B2May 11, 2010
High-performance CMOS SOI devices on hybrid crystal-oriented substrates
IBM5 citations63
US7342301B2Mar 11, 2008
Connection device with actuating element for changing a conductive state of a via
IBM3 citations63
US7960790B2Jun 14, 2011
Self-aligned planar double-gate transistor structure
IBM0 citations48