Inventor
WASHBURN STEVEN E
US6 patents
Patents
6 patentsUS10565336B2Feb 18, 2020
Pessimism reduction in cross-talk noise determination used in integrated circuit design
IBM3 citations71
US10248753B2Apr 2, 2019
Pessimism reduction in hierarchical blockage aggressors using estimated resistor and capacitor values
IBM2 citations70
US11017137B2May 25, 2021
Efficient projection based adjustment evaluation in static timing analysis of integrated circuits
IBM2 citations67
US6848089B2Jan 25, 2005
Method and apparatus for detecting devices that can latchup
IBM5 citations58
US10552570B2Feb 4, 2020
Pessimism reduction in hierarchical blockage aggressors using estimated resistor and capacitor values
IBM0 citations49
US10169514B2Jan 1, 2019
Approximation of resistor-capacitor circuit extraction for thread-safe design changes
IBM0 citations39