Inventor

LI ERIC J

US38 patents

⚠️ This page may combine multiple inventors who share the name “LI ERIC J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LI ERIC J

INTEL CORP

Adhesive with differential optical properties and its application for substrate processing

Laser micromachining method

Semiconductor wafer coat layers and methods therefor

Microelectronic devices designed with high frequency communication devices including compound semiconductor devices integrated on a die fabric on package

Helically insulated twinax cable systems and methods

Variable ball height on ball grid array packages by solder paste transfer

Method of forming a silicide layer on a thinned silicon wafer, and related semiconducting structure

Method of forming vias on a wafer stack using laser ablation

Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate

Dual pulsed beam laser micromachining method

Ultra small molded module integrated with die by module-on-wafer assembly

Architecture material and process to improve thermal performance of the embedded die package

Semiconductor wafer coat layers and methods therefor

Ultra small molded module integrated with die by module-on-wafer assembly

Stacked die cavity package

Variable ball height on ball grid array packages by solder paste transfer

Electromagnetic interference shielding for system-in-package technology

Electronic assembly that includes a bridge

Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate

Systems and methods for electromagnetic interference shielding

Electronic package assembly with compact die placement

Warpage control for microelectronics packages

Die warpage control for thin die assembly

Adhesive with differential optical properties and its application for substrate processing

Ultra small molded module integrated with die by module-on-wafer assembly

Stacked die cavity package

Method and materials for warpage thermal and interconnect solutions

Warpage control for microelectronics packages

Variable ball height on ball grid array packages by solder paste transfer

Low temperature thin wafer backside vacuum process with backgrinding tape

Nanopowder coating for scribing and structures formed thereby

Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrate

Systems and methods for electromagnetic interference shielding

KARHADE OMKAR G

Methods to form high density through-mold interconnections

Method and materials for warpage thermal and interconnect solutions

LI ERIC J

Semiconductor wafer coat layers and methods therefor

Low temperature thin wafer backside vacuum process with backgrinding tape

SANE SANDEEP B

Die warpage control for thin die assembly