Inventor · disambiguated record
Alan D. Poeppelman
Also filed as: POEPPELMAN ALAN D
11 granted patents·389 citations·filing 1982–2008
92Inventor score
Top patents by PatentIndex Score
11 records- 0196US6986098B2Method of reducing miscorrections in a post-processor using column parity checksLSI LOGIC CORP·Filed 2001·Granted Jan 10, 2006·201 cites·18 claims
- 0293US7602567B2Feed-forward DC restoration in a perpendicular magnetic read channelLSI CORP·Filed 2007·Granted Oct 13, 2009·18 cites·20 claims
- 0386US6617985B1Method and/or apparatus for implementing constraint codes with low error propagationLSI LOGIC CORP·Filed 2002·Granted Sep 9, 2003·22 cites·19 claims
- 0481US6823487B1Method and apparatus for enhancing correction power of reverse order error correction codesLSI LOGIC CORP·Filed 2001·Granted Nov 23, 2004·27 cites·20 claims
- 0578US7793196B2Methods and apparatus for improved error and erasure correction in a Reed-Solomon date channelLSI CORP·Filed 2006·Granted Sep 7, 2010·12 cites·19 claims
- 0674US6175941B1Error correction apparatus and associated method utilizing parellel processingLSI LOGIC CORP·Filed 1998·Granted Jan 16, 2001·37 cites·21 claims
- 0771US6279137B1System and method for a storage-efficient parallel Chien SearchLSI LOGIC CORP·Filed 1998·Granted Aug 21, 2001·33 cites·30 claims
- 0857US4692923AFault tolerant memoryNCR CO·Filed 1984·Granted Sep 8, 1987·21 cites·17 claims
- 0956US4527074AHigh voltage pass circuitNCR CO·Filed 1982·Granted Jul 2, 1985·10 cites·10 claims
- 1049US8151172B2Adjustable error-correction for a reed solomon encoder/decoderPOEPPELMAN ALAN D·Filed 2008·Granted Apr 3, 2012·3 cites·20 claims
- 1137US4769788AShared line direct write nonvolatile memory cell arrayNCR CO·Filed 1986·Granted Sep 6, 1988·5 cites·12 claims
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