P

Inventor

SRINIVAS MYSORE S

US42 patents
⚠️ This page may combine multiple inventors who share the name “SRINIVAS MYSORE S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

18 patents
US9218190B2Dec 22, 2015

Hybrid virtual machine configuration management

IBM92 citations98
US7698531B2Apr 13, 2010

Workload management in virtualized data processing environment

IBM39 citations92
US7617375B2Nov 10, 2009

Workload management in virtualized data processing environment

IBM26 citations92
US9052932B2Jun 9, 2015

Hybrid virtual machine configuration management

IBM7 citations84
US7698530B2Apr 13, 2010

Workload management in virtualized data processing environment

IBM12 citations84
US6845504B2Jan 18, 2005

Method and system for managing lock contention in a computer system

IBM17 citations83
US10120726B2Nov 6, 2018

Hybrid virtual machine configuration management

IBM2 citations73
US11221884B2Jan 11, 2022

Hybrid virtual machine configuration management

IBM0 citations62
US9459922B2Oct 4, 2016

Assigning a first portion of physical computing resources to a first logical partition and a second portion of the physical computing resources to a second logical portion

IBM1 citations62
US8959286B2Feb 17, 2015

Hybrid storage subsystem with mixed placement of file contents

IBM3 citations62
US8782646B2Jul 15, 2014

Non-uniform memory access (NUMA) enhancements for shared logical partitions

IBM2 citations62
US7640400B2Dec 29, 2009

Programmable data prefetching

IBM2 citations62
US9563559B2Feb 7, 2017

Dynamic prioritization of cache access

IBM0 citations52
US9727469B2Aug 8, 2017

Performance-driven cache line memory access

IBM0 citations51
US9626294B2Apr 18, 2017

Performance-driven cache line memory access

IBM1 citations51
US8874805B2Oct 28, 2014

Offloading input/output (I/O) completion operations

IBM0 citations51
US8843673B2Sep 23, 2014

Offloading input/output (I/O) completion operations

IBM1 citations51
US10310860B2Jun 4, 2019

Starting and stopping instruction dispatch to execution unit queues in a multi-pipeline processor

IBM0 citations50

BELL JR ROBERT H

7 patents

FLEMMING DIANE G

6 patents

CHEN WEN-TZER T

4 patents

ACCAPADI JOS M

2 patents

ANAND VAIJAYANTHIMALA K

2 patents

INT BUSINESS MACHINES CORPORATION

1 patent

MEWHINNEY GREG R

1 patent

MEHAFFY DAVID W

1 patent