Inventor
SRINIVAS MYSORE S
US42 patents
⚠️ This page may combine multiple inventors who share the name “SRINIVAS MYSORE S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
18 patentsUS9218190B2Dec 22, 2015
Hybrid virtual machine configuration management
IBM92 citations98
US7698531B2Apr 13, 2010
Workload management in virtualized data processing environment
IBM39 citations92
US7617375B2Nov 10, 2009
Workload management in virtualized data processing environment
IBM26 citations92
US9052932B2Jun 9, 2015
Hybrid virtual machine configuration management
IBM7 citations84
US7698530B2Apr 13, 2010
Workload management in virtualized data processing environment
IBM12 citations84
US6845504B2Jan 18, 2005
Method and system for managing lock contention in a computer system
IBM17 citations83
US10120726B2Nov 6, 2018
Hybrid virtual machine configuration management
IBM2 citations73
US11221884B2Jan 11, 2022
Hybrid virtual machine configuration management
IBM0 citations62
US9459922B2Oct 4, 2016
Assigning a first portion of physical computing resources to a first logical partition and a second portion of the physical computing resources to a second logical portion
IBM1 citations62
US8959286B2Feb 17, 2015
Hybrid storage subsystem with mixed placement of file contents
IBM3 citations62
US8782646B2Jul 15, 2014
Non-uniform memory access (NUMA) enhancements for shared logical partitions
IBM2 citations62
US7640400B2Dec 29, 2009
Programmable data prefetching
IBM2 citations62
US9563559B2Feb 7, 2017
Dynamic prioritization of cache access
IBM0 citations52
US9727469B2Aug 8, 2017
Performance-driven cache line memory access
IBM0 citations51
US9626294B2Apr 18, 2017
Performance-driven cache line memory access
IBM1 citations51
US8874805B2Oct 28, 2014
Offloading input/output (I/O) completion operations
IBM0 citations51
US8843673B2Sep 23, 2014
Offloading input/output (I/O) completion operations
IBM1 citations51
US10310860B2Jun 4, 2019
Starting and stopping instruction dispatch to execution unit queues in a multi-pipeline processor
IBM0 citations50
BELL JR ROBERT H
7 patentsUS8438334B2May 7, 2013
Hybrid storage subsystem with mixed placement of file contents
BELL JR ROBERT H30 citations92
US8943272B2Jan 27, 2015
Variable cache line size management
BELL JR ROBERT H5 citations84
US8769210B2Jul 1, 2014
Dynamic prioritization of cache access
BELL JR ROBERT H10 citations84
US8935478B2Jan 13, 2015
Variable cache line size management
BELL JR ROBERT H2 citations62
US9323527B2Apr 26, 2016
Performance of emerging applications in a virtualized environment using transient instruction streams
BELL JR ROBERT H0 citations52
US9298458B2Mar 29, 2016
Performance of emerging applications in a virtualized environment using transient instruction streams
BELL JR ROBERT H0 citations52
US8782346B2Jul 15, 2014
Dynamic prioritization of cache access
BELL JR ROBERT H0 citations52
FLEMMING DIANE G
6 patentsUS9135079B2Sep 15, 2015
Dynamically assigning a portion of physical computing resource to logical partitions based on characteristics of executing logical partitions
FLEMMING DIANE G18 citations92
US8677371B2Mar 18, 2014
Mixed operating performance modes including a shared cache mode
FLEMMING DIANE G6 citations83
US8219995B2Jul 10, 2012
Capturing hardware statistics for partitions to enable dispatching and scheduling efficiency
FLEMMING DIANE G20 citations83
US9135080B2Sep 15, 2015
Dynamically assigning a portion of physical computing resource to logical partitions based on characteristics of executing logical partitions
FLEMMING DIANE G1 citations51
US8966019B2Feb 24, 2015
Application server for mainframe computer systems
FLEMMING DIANE G1 citations51
US8695011B2Apr 8, 2014
Mixed operating performance modes including a shared cache mode
FLEMMING DIANE G1 citations51
CHEN WEN-TZER T
4 patentsUS8677050B2Mar 18, 2014
System, method and computer program product for extending a cache using processor registers
CHEN WEN-TZER T9 citations83
US8549354B2Oct 1, 2013
Managing rollback in a transactional memory environment
CHEN WEN-TZER T2 citations61
US8972706B2Mar 3, 2015
Performance in predicting branches
CHEN WEN-TZER T0 citations51
US8539281B2Sep 17, 2013
Managing rollback in a transactional memory environment
CHEN WEN-TZER T0 citations51
ACCAPADI JOS M
2 patentsUS8612986B2Dec 17, 2013
Computer program product for scheduling ready threads in a multiprocessor computer based on an interrupt mask flag value associated with a thread and a current processor priority register value
ACCAPADI JOS M7 citations82
US8230430B2Jul 24, 2012
Scheduling threads in a multiprocessor computer
ACCAPADI JOS M6 citations79
ANAND VAIJAYANTHIMALA K
2 patentsUS8301840B2Oct 30, 2012
Assigning cache priorities to virtual/logical processors and partitioning a cache according to such priorities
ANAND VAIJAYANTHIMALA K2 citations62
US8490094B2Jul 16, 2013
Non-uniform memory access (NUMA) enhancements for shared logical partitions
ANAND VAIJAYANTHIMALA K0 citations51