Inventor
CHUANG SHANG-TSE
US29 patents
⚠️ This page may combine multiple inventors who share the name “CHUANG SHANG-TSE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IYER SUNDAR
10 patentsUS8760958B2Jun 24, 2014
Methods and apparatus for designing and constructing multi-port memory circuits with voltage assist
IYER SUNDAR18 citations92
US8433880B2Apr 30, 2013
System and method for storing data in a virtualized high speed memory system
IYER SUNDAR7 citations84
US8902672B2Dec 2, 2014
Methods and apparatus for designing and constructing multi-port memory circuits
IYER SUNDAR13 citations83
US9293187B2Mar 22, 2016
Methods and apparatus for refreshing digital memory circuits
IYER SUNDAR5 citations73
US9058860B2Jun 16, 2015
Methods and apparatus for synthesizing multi-port memory circuits
IYER SUNDAR4 citations72
US9442846B2Sep 13, 2016
High speed memory systems and methods for designing hierarchical memory systems
IYER SUNDAR2 citations62
US8677072B2Mar 18, 2014
System and method for reduced latency caching
IYER SUNDAR3 citations62
US8504796B2Aug 6, 2013
System and method for storing data in a virtualized high speed memory system with an integrated memory mapping table
IYER SUNDAR3 citations62
US8266408B2Sep 11, 2012
System and method for storing data in a virtualized high speed memory system
IYER SUNDAR2 citations62
US8589851B2Nov 19, 2013
Intelligent memory system compiler
IYER SUNDAR0 citations51
CISCO TECH INC
7 patentsUS9520178B2Dec 13, 2016
Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
CISCO TECH INC5 citations84
US9147466B2Sep 29, 2015
Methods and apparatus for designing and constructing dual write memory circuits with voltage assist
CISCO TECH INC2 citations63
US10042573B2Aug 7, 2018
High speed memory systems and methods for designing hierarchical memory systems
CISCO TECH INC1 citations52
US9280464B2Mar 8, 2016
System and method for simultaneously storing and reading data from a memory system
CISCO TECH INC0 citations52
US9678669B2Jun 13, 2017
Hierarchical memory system compiler
CISCO TECH INC0 citations51
US9390212B2Jul 12, 2016
Methods and apparatus for synthesizing multi-port memory circuits
CISCO TECH INC1 citations51
US9965211B2May 8, 2018
Dynamic packet buffers with consolidation of low utilized memory banks
CISCO TECH INC0 citations39
EXPEDERA INC
6 patentsUS11151416B2Oct 19, 2021
Method and apparatus for efficiently processing convolution neural network operations
EXPEDERA INC6 citations79
US12229589B2Feb 18, 2025
Method and apparatus for scheduling matrix operations in digital processing systems
EXPEDERA INC2 citations70
US12182717B2Dec 31, 2024
Feature extraction with a convolutional neural network
EXPEDERA INC0 citations58
US11983616B2May 14, 2024
Methods and apparatus for constructing digital circuits for performing matrix operations
EXPEDERA INC0 citations58
US12008463B2Jun 11, 2024
Methods and apparatus for accessing external memory in a neural network processing system
EXPEDERA INC1 citations52
US12141226B2Nov 12, 2024
Systems and processes for organizing and controlling multiple matrix processor circuits
EXPEDERA INC0 citations47
MEMOIR SYSTEMS INC
3 patentsUS8838934B2Sep 16, 2014
System and method for storing data in a virtualized memory system with destructive reads
MEMOIR SYSTEMS INC4 citations74
US8935507B2Jan 13, 2015
System and method for storing multiple copies of data in a high speed memory system
MEMOIR SYSTEMS INC1 citations60
US9063876B2Jun 23, 2015
System and method for simultaneously storing and read data from a memory system
MEMOIR SYSTEMS INC0 citations50