Inventor

KLEIN MATTHIAS

US120 patents

⚠️ This page may combine multiple inventors who share the name “KLEIN MATTHIAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KLEIN MATTHIAS

IBM

Configurable ordering controller for coupling transactions

Directed interrupt virtualization with running indicator

Length-limited huffman encoding

Secure and efficient application data processing

Spilling temporary results for accommodation of memory boundaries

Resource allocation by virtual channel management and bus multiplexing

Write and read collision avoidance in single port memory devices

Controller address contention assumption

General-purpose processor instruction to perform compression/decompression operations

Data compression using dictionary encoding

Dynamic evaluation and adaption of hardware hash function

Increased bandwidth of ordered stores in a non-uniform memory subsystem

Accelerated compression/decompression including predefined dictionary

Compression hardware including active compression parameters

Synchronous input/output computer system including hardware invalidation of synchronous input/output context

Efficient software closing of hardware-generated encoding context

Synchronous data input/output system using prefetched device table entry

Computer system including synchronous input/output and hardware assisted purge of address translation cache entries of synchronous input/output transactions

Increased bandwidth of ordered stores in a non-uniform memory subsystem

Data transfer using a descriptor

Maintaining order with parallel access data streams

Error detection and recovery for synchronous input/output operations

Handling an input/output store instruction

Controller address contention assumption

Handling an input/output store instruction

Handling an input/output store instruction

Handling an input/output store instruction

Handling an input/output store instruction

Compression/decompression instruction specifying a history buffer to be used in the compression/decompression of data

Multi-mode compression acceleration

Peripheral component interconnect express (PCIE) network with input/output (I/O) chaining to reduce communication time within execution of I/O channel operations

Synchronous input / output hardware acknowledgement of write completions

Synchronous input/output (I/O) cache line padding

Migrating processes between source host and destination host using a shared virtual file system

Verifying the correctness of a deflate compression accelerator

Multilevel cache eviction management

Dynamic evaluation and adaption of hardware hash functions

Input/output traffic backpressure prediction

Handling an input/output store instruction

Directed interrupt virtualization with running indicator

Handling an input/output store instruction

Automatic hash function selection

Instant quiescing of an accelerator

Efficient generation of instrumentation data for direct memory access operations

KLEIN MATTHIAS

Sample handling tool

Column adapter

Universally applicable lysis buffer and processing methods for the lysis of bodily samples

UNIV UTAH RES FOUND

Flip chip metallization method and devices

JOHNSON CONTROLS COMPONENTS GMBH & CO KG

Vehicle seat, particularly a motor vehicle seat

MAURER MAIK STEFFEN

Serial text display for optimal recognition apparatus and method