P

Inventor

VAKHARWALA RUPIN

US14 patents

Patents

14 patents
US10761996B2Sep 1, 2020

Apparatus and method for secure memory access using trust domains

INTEL CORP7 citations83
US11392506B2Jul 19, 2022

Apparatus and method for secure memory access using trust domains

INTEL CORP3 citations72
US11048512B1Jun 29, 2021

Apparatus and method to identify the source of an interrupt

INTEL CORP4 citations72
US11526290B2Dec 13, 2022

System and method to track physical address accesses by a CPU or device

INTEL CORP5 citations71
US12222873B2Feb 11, 2025

Method and apparatus to enable a cache (DEVPIC) to store process specific information inside devices that support address translation service (ATS)

INTEL CORP0 citations62
US11921646B2Mar 5, 2024

Secure address translation services using a permission table

INTEL CORP0 citations61
US11900115B2Feb 13, 2024

Apparatus and method to identify the source of an interrupt

INTEL CORP0 citations61
US11614939B2Mar 28, 2023

Apparatus and method to identify the source of an interrupt

INTEL CORP0 citations61
US11392511B2Jul 19, 2022

Secure address translation services using a permission table

INTEL CORP0 citations61
US10949358B2Mar 16, 2021

Secure address translation services using message authentication codes and invalidation tracking

INTEL CORP1 citations61
US11169929B2Nov 9, 2021

Pause communication from I/O devices supporting page faults

INTEL CORP0 citations60
US12164444B2Dec 10, 2024

Device, method, and system to identify a page request to be processed after a reset event

INTEL CORP0 citations51
US11599621B2Mar 7, 2023

Apparatuses, methods, and systems for verification of input-output memory management unit to device attachment

INTEL CORP0 citations51
US12248561B2Mar 11, 2025

Apparatus and method for role-based register protection for TDX-IO

INTEL CORP0 citations47