Inventor
MUTHUKUMAR KALYAN
US19 patents
⚠️ This page may combine multiple inventors who share the name “MUTHUKUMAR KALYAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
16 patentsUS6820250B2Nov 16, 2004
Mechanism for software pipelining loop nests
INTEL CORP49 citations92
US6571385B1May 27, 2003
Early exit transformations for software pipelining
INTEL CORP41 citations92
US6321330B1Nov 20, 2001
Each iteration array selective loop data prefetch in multiple data width prefetch system using rotating register and parameterization to avoid redundant prefetch
INTEL CORP34 citations92
US6615403B1Sep 2, 2003
Compare speculation in software-pipelined loops
INTEL CORP39 citations89
US7316012B2Jan 1, 2008
System, method, and apparatus for spilling and filling rotating registers in software-pipelined loops
INTEL CORP12 citations83
US7263692B2Aug 28, 2007
System and method for software-pipelining of loops with sparse matrix routines
INTEL CORP15 citations83
US6912709B2Jun 28, 2005
Mechanism to avoid explicit prologs in software pipelined do-while loops
INTEL CORP16 citations80
US7617495B2Nov 10, 2009
Resource-aware scheduling for compilers
INTEL CORP7 citations72
US9665153B2May 30, 2017
Selecting a low power state based on cache flush latency determination
INTEL CORP2 citations71
US7302680B2Nov 27, 2007
Data repacking for memory accesses
INTEL CORP9 citations71
US10631113B2Apr 21, 2020
Mobile device based techniques for detection and prevention of hearing loss
INTEL CORP5 citations67
US10963038B2Mar 30, 2021
Selecting a low power state based on cache flush latency determination
INTEL CORP0 citations60
US11688515B2Jun 27, 2023
Mobile device based techniques for detection and prevention of hearing loss
INTEL CORP0 citations57
US7712091B2May 4, 2010
Method for predicate promotion in a software loop
INTEL CORP6 citations56
US10198065B2Feb 5, 2019
Selecting a low power state based on cache flush latency determination
INTEL CORP0 citations50
US7774766B2Aug 10, 2010
Method and system for performing reassociation in software loops
INTEL CORP0 citations41
IBM
2 patentsUS6175957B1Jan 16, 2001
Method of, system for, and computer program product for providing efficient utilization of memory hierarchy through code restructuring
IBM105 citations97
US6839895B1Jan 4, 2005
Method of, system for, and computer program product for providing efficient utilization of memory hierarchy through code restructuring
IBM47 citations95