Inventor

MILADINOVIC NENAD

US53 patents

⚠️ This page may combine multiple inventors who share the name “MILADINOVIC NENAD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MILADINOVIC NENAD

PURE STORAGE INC

Error recovery in a storage cluster

Read voltage optimization

Die-level monitoring in a storage cluster

Data rebuild on feedback from a queue in a non-volatile solid-state storage

Die-level monitoring in a storage cluster

Tracking of optimum read voltage thresholds in nand flash devices

Optimal scheduling of flash operations

Adjustable error correction based on memory health in a storage unit

Mapping around defective flash memory of a storage array

Masking defective bits in a storage array

Calibration of flash channels in SSD

Adjusting a variable parameter to increase reliability of stored data

Data rebuild based on solid state memory characteristics

Recovering error corrected data

Resiliency scheme to enhance storage performance

Die-level monitoring in a storage cluster

Recovering error corrected data

Proactive data rebuild based on queue feedback

Die-level monitoring in a storage cluster

Error recovery in a storage cluster

Failure mapping in a storage array

Data rebuild on feedback from a queue in a non-volatile solid-state storage

Failure mapping in a storage array

Error correction incident tracking

Wear levelling for differing memory types

Intelligent operation scheduling based on latency of operations

Storage cluster memory characterization

Increased data reliability

Multiple read data paths in a storage system

Mapping defective memory in a storage system

Error correction bypass for erased pages

Erase detection logic for a storage system

Erase block state detection

HARATSCH ERICH F

Methods and apparatus for computing soft data or log likelihood ratios for received values in communication or storage systems

Methods and apparatus for approximating a probability density function or distribution for a received value in communication or storage systems

Methods and apparatus for read-side intercell interference mitigation in flash memories

Methods and apparatus for soft demapping and intercell interference mitigation in flash memories

Methods and apparatus for programming multiple program values per signal level in flash memories

Methods and apparatus for write-side intercell interference mitigation in flash memories

Methods and apparatus for soft data generation for memory devices using decoder performance feedback

Methods and apparatus for soft data generation for memory devices

Methods and apparatus for synchronization mark detection based on a position of an extreme distance metric

Methods and apparatus for computing a probability value of a received value in communication or storage systems

PELEATO-INARREA BORJA

Dual-stage data decoding for non-volatile memories

LSI CORP

Pad current splitting

MILADINOVIC NENAD

Method for iterative error correction with designed error floor performance

XIA HAITAO

Systems and methods for data detection using distance based tuning

KRISHNAN ANANTHA RAMAN

Stochastic stream decoding of binary LDPC codes

PELEATO-INARREA BORJA MANUEL

Two dimensional encoding for non-volatile memory blocks

BURGER JR HARLEY F

Methods and apparatus for soft data generation for memory devices based using reference cells