P

Inventor

VANDENTOP GILROY J

US18 patents
⚠️ This page may combine multiple inventors who share the name “VANDENTOP GILROY J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

16 patents
US6580611B1Jun 17, 2003

Dual-sided heat removal system

INTEL CORP176 citations99
US7359591B2Apr 15, 2008

Electrical/optical integration scheme using direct copper bonding

INTEL CORP24 citations92
US7355277B2Apr 8, 2008

Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package

INTEL CORP30 citations92
US7236666B2Jun 26, 2007

On-substrate microlens to couple an off-substrate light emitter and/or receiver with an on-substrate optical device

INTEL CORP19 citations92
US7063268B2Jun 20, 2006

Electro-active fluid cooling system

INTEL CORP26 citations92
US6792179B2Sep 14, 2004

Optical thumbtack

INTEL CORP35 citations92
US5844300ADec 1, 1998

Single poly devices for monitoring the level and polarity of process induced charging in a MOS process

INTEL CORP48 citations91
US6001699ADec 14, 1999

Highly selective etch process for submicron contacts

INTEL CORP24 citations90
US7703991B2Apr 27, 2010

Flip-chip mountable optical connector for chip-to-chip optical interconnectability

INTEL CORP10 citations84
US7569426B2Aug 4, 2009

Apparatus and method integrating an electro-osmotic pump and microchannel assembly into a die package

INTEL CORP14 citations84
US6717066B2Apr 6, 2004

Electronic packages having multiple-zone interconnects and methods of manufacture

INTEL CORP14 citations84
US7826694B2Nov 2, 2010

Electrical/optical integration scheme using direct copper bonding

INTEL CORP7 citations74
US5549784AAug 27, 1996

Method for etching silicon oxide films in a reactive ion etch system to prevent gate oxide damage

INTEL CORP18 citations70
US7371630B2May 13, 2008

Patterned backside stress engineering for transistor performance optimization

INTEL CORP2 citations62
US7821073B2Oct 26, 2010

Patterned backside stress engineering for transistor performance optimization

INTEL CORP0 citations52
US7330357B2Feb 12, 2008

Integrated circuit die/package interconnect

INTEL CORP0 citations50

LU DAOQIANG

2 patents