Inventor

PAI YI-FANG

TW33 patents

⚠️ This page may combine multiple inventors who share the name “PAI YI-FANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PAI YI-FANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Methods for reducing contact resistance in semiconductors manufacturing process

Method for manufacturing semiconductor structure with enlarged volumes of source-drain regions

Integrated circuits having source/drain structure

Integrated circuits having source/drain structure

Semiconductor structure with enhanced contact and method of manufacture the same

Epitaxial formation of source and drain regions

Semiconductor device structure and method for forming the same

Method for forming an undoped region under a source/drain

Integrated circuits having source/drain structure and method of making

Integrated circuits having source/drain structure and method of making

Device with engineered epitaxial region and methods of making same

Source/drain regions of semiconductor devices and methods of forming the same

Source/drain regions of semiconductor devices and methods of forming the same

Source/drain regions of semiconductor devices and methods of forming the same

Epitaxy regions with large landing areas for contact plugs

Epitaxy regions with large landing areas for contact plugs

Fin field-effect transistor device and method of forming

Semiconductor device structure with source/drain structure and method for forming the same

Method of fabricating an integrated circuit device

Semiconductor device source/drain region with arsenic-containing barrier region

Semiconductor device source/drain region with arsenic-containing barrier region

Cyclic deposition etch chemical vapor deposition epitaxy to reduce EPI abnormality

SU CHIEN-CHANG

Epitaxy profile engineering for FinFETs

Epitaxy profile engineering for FinFETs

Method for incorporating impurity element in EPI silicon process

TAIWAN SEMICONDUCTOR MFG

Asymmetric cyclic desposition etch epitaxy

Method of forming strained structures with compound profiles in semiconductor devices

Method for incorporating impurity element in EPI silicon process

TSAI CHUN HSIUNG

Epitaxial formation of source and drain regions

HUANG SHIH-HSIEN

Integrated circuits and fabrication methods thereof

YEH MING-HSI

Method of fabricating an integrated circuit device

WONG KING-YUEN

Device with engineered epitaxial region and methods of making same

WU CHII-MING

Source/drain formation and structure