Inventor

SHUMA STEPHEN G

US47 patents

⚠️ This page may combine multiple inventors who share the name “SHUMA STEPHEN G”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHUMA STEPHEN G

IBM

Voltage and frequency balancing at nominal point

Voltage and frequency balancing at nominal point

Timing optimization driven by statistical sensitivites

Timing adjustments across transparent latches to facilitate power reduction

Dynamic voltage frequency scaling

Variable accuracy parameter modeling in statistical timing

Three-dimensional chip stack for self-powered integrated circuit

Mechanism for detection and compensation of NBTI induced threshold degradation

Multi-sided variations for creating integrated circuits

Voltage and frequency balancing at nominal point

Voltage and frequency balancing at nominal point

Selection of corners and/or margins using statistical static timing analysis of an integrated circuit

Integration of functional analysis and common path pessimism removal in static timing analysis

Integration of functional analysis and common path pessimism removal in static timing analysis

Programmable clock division methodology with in-context frequency checking

System and method for efficient statistical timing analysis of cycle time independent tests

System and method for efficient statistical timing analysis of cycle time independent tests

Redundant critical path circuits to meet performance requirement

Device-based random variability modeling in timing analysis

Structure for an on-demand power supply current modification system for an integrated circuit

Mechanism for detection and compensation of NBTI induced threshold degradation

System architectures for and methods of scheduling on-chip and across-chip noise events in an integrated circuit

Method and system for extending the useful life of another system

Method and system for extending the useful life of another system

Selection of corners and/or margins using statistical static timing analysis of an integrated circuit

Multi-sided variations for creating integrated circuits

Multi-sided variations for creating integrated circuits

Sensitivity calculation filtering for statistical static timing analysis of an integrated circuit

Sensitivity calculation filtering for statistical static timing analysis of an integrated circuit

Variable accuracy parameter modeling in statistical timing

Three-dimensional inter-chip contact through vertical displacement MEMS

System and method for efficient statistical timing analysis of cycle time independent tests

Three-dimensional inter-chip contact through vertical displacement MEMS

Method of sharing and re-using timing models in a chip across multiple voltage domains

Adaptive characterization and instantiation of timing abstracts

Programmable clock division methodology with in-context frequency checking

Addressing of process and voltage points

Structure for system architectures for and methods of scheduling on-chip and across-chip noise events in an integrated circuit

Structure for system for extending the useful life of another system

Independently projecting a canonical clock

GOODNOW KENNETH J

Secondary power utilization during peak power times

Secondary power utilization during peak power times

System for prediction and communication of environmentally induced power useage limitation

GLOBALFOUNDRIES INC

Dynamic and adaptive timing sensitivity during static timing analysis using look-up table

VISWESWARIAH CHANDRAMOULI

Method for achieving an efficient statistical optimization of integrated circuits

EBBERS JONATHAN

Switch to perform non-destructive and secure disablement of IC functionality utilizing MEMS and method thereof

BARROWS COREY K

On-demand power supply current modification system and method for an integrated circuit