Inventor
GLOSSOP KENT D
US26 patents
Patents
26 patentsUS10515049B1Dec 24, 2019
Memory circuits and methods for distributed memory hazard detection and error recovery
INTEL CORP32 citations93
US10467183B2Nov 5, 2019
Processors and methods for pipelined runtime services in a spatial array
INTEL CORP28 citations90
US11693691B2Jul 4, 2023
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP4 citations85
US11086816B2Aug 10, 2021
Processors, methods, and systems for debugging a configurable spatial accelerator
INTEL CORP9 citations85
US10515046B2Dec 24, 2019
Processors, methods, and systems with a configurable spatial accelerator
INTEL CORP18 citations85
US11593295B2Feb 28, 2023
Apparatuses, methods, and systems for operations in a configurable spatial accelerator
INTEL CORP6 citations83
US11416281B2Aug 16, 2022
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP4 citations83
US11200186B2Dec 14, 2021
Apparatuses, methods, and systems for operations in a configurable spatial accelerator
INTEL CORP11 citations83
US11093277B2Aug 17, 2021
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP6 citations83
US10445451B2Oct 15, 2019
Processors, methods, and systems for a configurable spatial accelerator with performance, correctness, and power reduction features
INTEL CORP8 citations83
US10416999B2Sep 17, 2019
Processors, methods, and systems with a configurable spatial accelerator
INTEL CORP8 citations83
US10346145B2Jul 9, 2019
Loop execution with predicate computing for dataflow machines
INTEL CORP10 citations83
US10558575B2Feb 11, 2020
Processors, methods, and systems with a configurable spatial accelerator
INTEL CORP7 citations82
US10445098B2Oct 15, 2019
Processors and methods for privileged configuration in a spatial array
INTEL CORP10 citations82
US10387319B2Aug 20, 2019
Processors, methods, and systems for a configurable spatial accelerator with memory system performance, power reduction, and atomics support features
INTEL CORP9 citations82
US10572376B2Feb 25, 2020
Memory ordering in acceleration hardware
INTEL CORP9 citations81
US10474375B2Nov 12, 2019
Runtime address disambiguation in acceleration hardware
INTEL CORP9 citations81
US10380063B2Aug 13, 2019
Processors, methods, and systems with a configurable spatial accelerator having a sequencer dataflow operator
INTEL CORP13 citations80
US12135981B2Nov 5, 2024
Systems, methods, and apparatuses for heterogeneous computing
INTEL CORP1 citations72
US10496574B2Dec 3, 2019
Processors, methods, and systems for a memory fence in a configurable spatial accelerator
INTEL CORP6 citations72
US10469397B2Nov 5, 2019
Processors and methods with configurable network-based dataflow operator circuits
INTEL CORP6 citations72
US10445234B2Oct 15, 2019
Processors, methods, and systems for a configurable spatial accelerator with transactional and replay features
INTEL CORP4 citations72
US10417175B2Sep 17, 2019
Apparatus, methods, and systems for memory consistency in a configurable spatial accelerator
INTEL CORP2 citations72
US10445250B2Oct 15, 2019
Apparatus, methods, and systems with a configurable spatial accelerator
INTEL CORP3 citations71
US10817291B2Oct 27, 2020
Apparatuses, methods, and systems for swizzle operations in a configurable spatial accelerator
INTEL CORP2 citations69
US10346144B2Jul 9, 2019
Methods and apparatus to map single static assignment instructions onto a data flow graph in a data flow architecture
INTEL CORP1 citations62