P

Inventor

DONG XIANGYU

US33 patents
⚠️ This page may combine multiple inventors who share the name “DONG XIANGYU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

QUALCOMM INC

24 patents
US9299457B2Mar 29, 2016

Kernel masking of DRAM defects

QUALCOMM INC47 citations94
US9911485B2Mar 6, 2018

Method and apparatus for refreshing a memory cell

QUALCOMM INC13 citations84
US9304913B2Apr 5, 2016

Mixed memory type hybrid cache

QUALCOMM INC11 citations84
US9292451B2Mar 22, 2016

Methods and apparatus for intra-set wear-leveling for memories with limited write endurance

QUALCOMM INC9 citations84
US9275714B1Mar 1, 2016

Read operation of MRAM using a dummy word line

QUALCOMM INC13 citations84
US8982654B2Mar 17, 2015

DRAM sub-array level refresh

QUALCOMM INC13 citations84
US9524771B2Dec 20, 2016

DRAM sub-array level autonomic refresh memory controller optimization

QUALCOMM INC10 citations83
US9472257B2Oct 18, 2016

Hybrid magnetoresistive read only memory (MRAM) cache mixing single-ended and differential sensing

QUALCOMM INC4 citations73
US9431129B2Aug 30, 2016

Variable read delay system

QUALCOMM INC5 citations73
US9411727B2Aug 9, 2016

Split write operation for resistive memory cache

QUALCOMM INC3 citations73
US9368187B2Jun 14, 2016

Insertion-override counter to support multiple memory refresh rates

QUALCOMM INC4 citations73
US9239788B2Jan 19, 2016

Split write operation for resistive memory cache

QUALCOMM INC4 citations73
US9224452B2Dec 29, 2015

Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems

QUALCOMM INC4 citations73
US9224442B2Dec 29, 2015

System and method to dynamically determine a timing parameter of a memory device

QUALCOMM INC5 citations73
US9812222B2Nov 7, 2017

Method and apparatus for in-system management and repair of semi-conductor memory failure

QUALCOMM INC5 citations72
US9436606B2Sep 6, 2016

System and method to defragment a memory

QUALCOMM INC2 citations63
US9378793B2Jun 28, 2016

Integrated MRAM module

QUALCOMM INC0 citations52
US9348743B2May 24, 2016

Inter-set wear-leveling for caches with limited write endurance

QUALCOMM INC0 citations52
US9250998B2Feb 2, 2016

Cache structure with parity-protected clean data and ECC-protected dirty data

QUALCOMM INC0 citations52
US9230634B2Jan 5, 2016

Refresh scheme for memory cells with next bit table

QUALCOMM INC0 citations52
US9196339B2Nov 24, 2015

Resistance-based memory cells with multiple source lines

QUALCOMM INC1 citations52
US9495261B2Nov 15, 2016

Systems and methods for reducing memory failures

QUALCOMM INC0 citations51
US9378081B2Jun 28, 2016

Bit remapping system

QUALCOMM INC1 citations51
US9704557B2Jul 11, 2017

Method and apparatus for storing retention time profile information based on retention time and temperature

QUALCOMM INC0 citations41

GOOGLE LLC

7 patents

INST OF EXPLORATION TECHNIQUES CHINESE ACADEMY OF GEOLOGICAL SCIENCES

1 patent

MERIDIAN LAB

1 patent