Inventor

AGRAWAL VISHWANI D

US11 patents

⚠️ This page may combine multiple inventors who share the name “AGRAWAL VISHWANI D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AT & T BELL LAB

4 patents

US5043986AAug 27, 1991

Method and integrated circuit adapted for partial scan testability

AT & T BELL LAB86 citations95

US5228040AJul 13, 1993

Testable implementations of finite state machines and methods for producing them

AT & T BELL LAB21 citations92

US5257268AOct 26, 1993

Cost-function directed search method for generating tests for sequential logic circuits

AT & T BELL LAB41 citations89

US5365528ANov 15, 1994

Method for testing delay faults in non-scan sequential circuits

AT & T BELL LAB15 citations72

LUCENT TECHNOLOGIES INC

2 patents

US5606567AFeb 25, 1997

Delay testing of high-performance digital components by a slow-speed tester

LUCENT TECHNOLOGIES INC61 citations94

US5590135ADec 31, 1996

Testing a sequential circuit

LUCENT TECHNOLOGIES INC21 citations91

AT & T CORP

1 patent

US5499249AMar 12, 1996

Method and apparatus for test generation and fault simulation for sequential circuits with embedded random access memories (RAMs)

AT & T CORP34 citations91

AT & T LAB

1 patent

US4493077AJan 8, 1985

Scan testable integrated circuit

AT & T LAB92 citations91

NEC USA INC

1 patent

US5657240AAug 12, 1997

Testing and removal of redundancies in VLSI circuits with non-boolean primitives

NEC USA INC27 citations90

UNIV RUTGERS

1 patent

US6131181AOct 10, 2000

Method and system for identifying tested path delay faults

UNIV RUTGERS13 citations66

UNIV AUBURN

1 patent

US12306247B2May 20, 2025

System and method for optimizing fault coverage based on optimized test point insertion determinations for logical circuits

UNIV AUBURN0 citations42