Inventor
NAWA TAKANORI
JP5 patents
Patents
5 patentsUS6405346B1Jun 11, 2002
Method for optimizing power supply wiring in a semiconductor integrated circuit
FUJITSU LTD37 citations89
US6247162B1Jun 12, 2001
Method and apparatus for generating layout data for a semiconductor integrated circuit device
FUJITSU LTD34 citations89
US6405354B1Jun 11, 2002
Method and apparatus to optimize power wiring layout and generate wiring layout data for a semiconductor integrated circuit
FUJITSU LTD19 citations80
US5130573AJul 14, 1992
Semiconductor integrated circuit having ecl circuits and a circuit for compensating a capacitive load
FUJITSU LTD4 citations60
US6604229B2Aug 5, 2003
Method of designing wiring for power sources in a semiconductor chip, and a computer product
FUJITSU LTD0 citations38