Inventor
AITKEN JOHN M
US23 patents
Patents
23 patentsUS5363550ANov 15, 1994
Method of Fabricating a micro-coaxial wiring structure
IBM112 citations97
US5444015AAug 22, 1995
Larce scale IC personalization method employing air dielectric structure for extended conductors
IBM77 citations96
US5268324ADec 7, 1993
Modified silicon CMOS process having selectively deposited Si/SiGe FETS
IBM79 citations95
US6788093B2Sep 7, 2004
Methodology and apparatus using real-time optical signal for wafer-level device dielectrical reliability studies
IBM131 citations93
US7381981B2Jun 3, 2008
Phase-change TaN resistor based triple-state/multi-state read only memory
IBM18 citations92
US6252275B1Jun 26, 2001
Silicon-on-insulator non-volatile random access memory device
IBM20 citations92
US5530290AJun 25, 1996
Large scale IC personalization method employing air dielectric structure for extended conductor
IBM22 citations92
US6352902B1Mar 5, 2002
Process of forming a capacitor on a substrate
IBM14 citations84
US6159787ADec 12, 2000
Structures and processes for reduced topography trench capacitors
IBM15 citations82
US7315075B2Jan 1, 2008
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM8 citations74
US7084483B2Aug 1, 2006
Trench type buried on-chip precision programmable resistor
IBM10 citations74
US7064414B2Jun 20, 2006
Heater for annealing trapped charge in a semiconductor device
IBM10 citations74
US6088258AJul 11, 2000
Structures for reduced topography capacitors
IBM14 citations74
US7943482B2May 17, 2011
Method for semiconductor device having radiation hardened insulators and design structure thereof
IBM4 citations63
US7935609B2May 3, 2011
Method for fabricating semiconductor device having radiation hardened insulators
IBM4 citations63
US7880158B2Feb 1, 2011
Phase-change TaN resistor based triple-state/multi-state read only memory
IBM2 citations63
US7715248B2May 11, 2010
Phase-change TaN resistor based triple-state/multi-state read only memory
IBM3 citations63
US7601602B2Oct 13, 2009
Trench type buried on-chip precision programmable resistor
IBM2 citations63
US7388274B2Jun 17, 2008
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM4 citations63
US6333239B1Dec 25, 2001
Processes for reduced topography capacitors
IBM2 citations63
US7791169B2Sep 7, 2010
Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors
IBM0 citations52
US8035200B2Oct 11, 2011
Neutralization of trapped charge in a charge accumulation layer of a semiconductor structure
IBM0 citations50
US7736915B2Jun 15, 2010
Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure
IBM0 citations50