P

Inventor

BEYER KLAUS D

US27 patents
⚠️ This page may combine multiple inventors who share the name “BEYER KLAUS D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

26 patents
US5391911AFeb 21, 1995

Reach-through isolation silicon-on-insulator device

IBM138 citations98
US5234535AAug 10, 1993

Method of producing a thin silicon-on-insulator layer

IBM197 citations98
US4671851AJun 9, 1987

Method for removing protuberances at the surface of a semiconductor wafer using a chem-mech polishing technique

IBM189 citations98
US5405795AApr 11, 1995

Method of forming a SOI transistor having a self-aligned body contact

IBM110 citations97
US4944836AJul 31, 1990

Chem-mech polishing method for producing coplanar metal/insulator films on a substrate

IBM539 citations97
US5444015AAug 22, 1995

Larce scale IC personalization method employing air dielectric structure for extended conductors

IBM77 citations96
US5366923ANov 22, 1994

Bonded wafer structure having a buried insulation layer

IBM54 citations96
US5313094AMay 17, 1994

Thermal dissipation of integrated circuits using diamond paths

IBM134 citations96
US5098856AMar 24, 1992

Air-filled isolation trench with chemically vapor deposited silicon dioxide cap

IBM102 citations96
US4758531AJul 19, 1988

Method of making defect free silicon islands using SEG

IBM100 citations96
US4745081AMay 17, 1988

Method of trench filling

IBM67 citations96
US4528047AJul 9, 1985

Method for forming a void free isolation structure utilizing etch and refill techniques

IBM105 citations96
US6498383B2Dec 24, 2002

Oxynitride shallow trench isolation and method of formation

IBM49 citations95
US5227658AJul 13, 1993

Buried air dielectric isolation of silicon islands

IBM63 citations95
US6764922B2Jul 20, 2004

Method of formation of an oxynitride shallow trench isolation

IBM22 citations92
US6709951B2Mar 23, 2004

Oxynitride shallow trench isolation and method of formation

IBM15 citations92
US5530290AJun 25, 1996

Large scale IC personalization method employing air dielectric structure for extended conductor

IBM22 citations92
US5306659AApr 26, 1994

Reach-through isolation etching method for silicon-on-insulator devices

IBM23 citations92
US5264387ANov 23, 1993

Method of forming uniformly thin, isolated silicon mesas on an insulating substrate

IBM27 citations92
US5232866AAug 3, 1993

Isolated films using an air dielectric

IBM48 citations92
US4924284AMay 8, 1990

Method of trench filling

IBM41 citations92
US4264374AApr 28, 1981

Cleaning process for p-type silicon surface

IBM56 citations91
US4069068AJan 17, 1978

Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions

IBM28 citations80
US6602759B2Aug 5, 2003

Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon

IBM7 citations74
US4333794AJun 8, 1982

Omission of thick Si3 N4 layers in ISA schemes

IBM20 citations74
US6825097B2Nov 30, 2004

Triple oxide fill for trench isolation

IBM5 citations59

BEYER KLAUS D

1 patent