Inventor

VERGIS GEORGE

US92 patents

⚠️ This page may combine multiple inventors who share the name “VERGIS GEORGE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VERGIS GEORGE

INTEL CORP

Time multiplexed dynamic on-die termination

Dynamic on-die termination launch latency reduction

Integrated RAM thermal sensor

Method and apparatus to calibrate DRAM on resistance (Ron) and on-die termination (ODT) values over process, voltage and temperature (PVT) variations

Method and apparatus to control the temperature of a memory device

Polarity driven dynamic on-die termination

Techniques to access or operate a dual in-line memory module via multiple data channels

Stepped slot connector to enable low height platforms

Circuit board with a connector having a latch that includes a latch frame, a latch slide, an ejector and a connector arm

CPU package substrates with removable memory mechanical interfaces

Techniques to communicate with a controller for a non-volatile dual in-line memory module

Techniques to couple high bandwidth memory device on silicon substrate and package substrate

Memory module connector, memory module, and pivotable latch

Crosstalk reducing connector pin geometry

Retention of dual in-line memory modules

DIMM for a high bandwidth memory channel

Techniques to mirror a command/address or interpret command/address logic at a memory device

Double data rate command bus

Connector with anchoring power pin

Fast memory initialization

Techniques to access or operate a dual in-line memory module via multiple data channels

Thermal solution on latch for sodimm connector

High performance persistent memory

Method and apparatus for optimizing strobe to clock relationship

Method and apparatus to reduce power consumption for refresh of memory devices on a memory module

Load reduced nonvolatile memory interface

Accessing data stored in a command/address register device

Load reduced nonvolatile memory interface

Memory device with insertable portion

DIMM socket with seating floor to meet both longer length edge contacts and shorter length edge contacts

Dual in-line memory module (DIMM) socket that prevents improper DIMM release

High performance memory module with reduced loading

Dual in-line memory module (DIMM) socket circuit to detect improper insertion of a DIMM edge into a DIMM socket

High bandwidth DIMM

High performance persistent memory

High-capacity server memory device in a single unit form factor

DIMM retention assembly for compression mount technology and land grid array connector loading

Method and apparatus for improved memory module supply current surge response

Method, apparatus and system for device transparent grouping of devices on a bus

Connector retention mechanism for improved structural reliability

VERGIS GEORGE

Codeset communication format and related methods and structures

Memory module bus termination voltage (VTT) regulation and management

Method and apparatus for interfacing with heterogeneous dual in-line memory modules

UEI CAYMAN INC

Dynamic linking of codesets in universal remote control devices

Codeset communication format and related methods and structures

TAHOE RES LTD

Techniques to couple high bandwidth memory device on silicon substrate and package substrate

Techniques to couple high bandwidth memory device on silicon substrate and package substrate

UNIVERSAL ELECTRONICS INC

Codeset communication format and related methods and structures

Codeset communication format and related methods and structures

BAINS KULJIT S

Method to stagger self refreshes