Inventor
CHAO IWEN
US10 patents
⚠️ This page may combine multiple inventors who share the name “CHAO IWEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
9 patentsUS7145249B2Dec 5, 2006
Semiconducting device with folded interposer
INTEL CORP25 citations87
US9418000B2Aug 16, 2016
Dynamically compensating for degradation of a non-volatile memory device
INTEL CORP9 citations84
US7378725B2May 27, 2008
Semiconducting device with stacked dice
INTEL CORP10 citations82
US9543019B2Jan 10, 2017
Error corrected pre-read for upper page write in a multi-level cell memory
INTEL CORP3 citations71
US9524774B2Dec 20, 2016
Lower page read for multi-level cell memory
INTEL CORP0 citations51
US9236136B2Jan 12, 2016
Lower page read for multi-level cell memory
INTEL CORP0 citations51
US7741155B2Jun 22, 2010
Method of manufacturing semiconducting device with stacked dice
INTEL CORP0 citations50
US7482698B2Jan 27, 2009
Semiconducting device with folded interposer
INTEL CORP0 citations47
US7456048B2Nov 25, 2008
Semiconducting device with folded interposer
INTEL CORP0 citations47