P

Inventor

KNICKERBOCKER JOHN ULRICH

US40 patents
⚠️ This page may combine multiple inventors who share the name “KNICKERBOCKER JOHN ULRICH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

29 patents
US6528145B1Mar 4, 2003

Polymer and ceramic composite electronic substrates

IBM208 citations98
US8008764B2Aug 30, 2011

Bridges for interconnecting interposers in multi-chip integrated circuits

IBM42 citations95
US7808798B2Oct 5, 2010

Versatile Si-based packaging with integrated passive components for mmWave applications

IBM27 citations92
US7750459B2Jul 6, 2010

Integrated module for data processing system

IBM29 citations92
US7518229B2Apr 14, 2009

Versatile Si-based packaging with integrated passive components for mmWave applications

IBM31 citations92
US7486525B2Feb 3, 2009

Temporary chip attach carrier

IBM17 citations92
US5783026AJul 21, 1998

Apparatus for stacking sheets by carriers

IBM42 citations91
US7863189B2Jan 4, 2011

Methods for fabricating silicon carriers with conductive through-vias with low stress and low defect density

IBM32 citations90
US8581392B2Nov 12, 2013

Silicon based microchannel cooling and electrical package

IBM8 citations84
US7902069B2Mar 8, 2011

Small area, robust silicon via structure and process

IBM6 citations74
US5986395ANov 16, 1999

Metal/ferrite laminate magnet

IBM6 citations74
US5665195ASep 9, 1997

Apparatus for forming cavities without using an insert

IBM8 citations74
US7741153B2Jun 22, 2010

Modular chip integration techniques

IBM7 citations73
US5707476AJan 13, 1998

Method for forming multiple cavity products

IBM8 citations71
US5876549AMar 2, 1999

Method and apparatus for stacking sheets supported by carriers

IBM10 citations69
US5759669AJun 2, 1998

Apparatus and method for screening green sheet with via hole using porous backing material

IBM14 citations69
US8354737B2Jan 15, 2013

Small area, robust silicon via structure and process

IBM2 citations63
US7713575B2May 11, 2010

Method and apparatus for depositing coplanar microelectronic interconnectors using a compliant mold

IBM4 citations63
US7514290B1Apr 7, 2009

Chip-to-wafer integration technology for three-dimensional chip stacking

IBM3 citations63
US6264885B1Jul 24, 2001

Metal/ferrite laminate magnet

IBM2 citations63
US5772837AJun 30, 1998

Apparatus for forming cavities without using an insert

IBM3 citations63
US7892885B2Feb 22, 2011

Techniques for modular chip fabrication

IBM2 citations62
US7282391B1Oct 16, 2007

Method for precision assembly of integrated circuit chip packages

IBM5 citations62
US6376054B1Apr 23, 2002

Surface metallization structure for multiple chip test and burn-in

IBM5 citations61
US5707480AJan 13, 1998

Apparatus for forming multiple cavity products

IBM5 citations60
US5891543AApr 6, 1999

Apparatus and method for screening using electrostatic adhesion

IBM3 citations58
US7504718B2Mar 17, 2009

Apparatus and methods for constructing balanced chip packages to reduce thermally induced mechanical strain

IBM6 citations57
US7615405B2Nov 10, 2009

Method for precision assembly of integrated circuit chip packages

IBM0 citations52
US6376983B1Apr 23, 2002

Etched and formed extractor grid

IBM1 citations51

KNICKERBOCKER JOHN ULRICH

3 patents

CARON ALAIN

2 patents

HAMEL HARVEY

2 patents

JOSEPH DOUGLAS JAMES

1 patent

GRUBER PETER A

1 patent

ANDRY PAUL STEPHEN

1 patent

DANG BING

1 patent