Inventor
KOHLI NISHU
IN13 patents
⚠️ This page may combine multiple inventors who share the name “KOHLI NISHU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
KOHLI NISHU
8 patentsUS9003255B2Apr 7, 2015
Automatic test-pattern generation for memory-shadow-logic testing
KOHLI NISHU6 citations82
US8929115B2Jan 6, 2015
XY ternary content addressable memory (TCAM) cell and array
KOHLI NISHU9 citations82
US8681534B2Mar 25, 2014
Dual port register file memory cell with reduced susceptibility to noise during same row access
KOHLI NISHU3 citations60
US8730756B2May 20, 2014
Dual clock edge triggered memory
KOHLI NISHU2 citations55
US8963053B2Feb 24, 2015
Programmable delay introducing circuit in self-timed memory
KOHLI NISHU0 citations51
US8138455B2Mar 20, 2012
Programmable delay introducing circuit in self timed memory
KOHLI NISHU0 citations51
US8854901B2Oct 7, 2014
Read self timing circuitry for self-timed memory
KOHLI NISHU0 citations39
US8854902B2Oct 7, 2014
Write self timing circuitry for self-timed memory
KOHLI NISHU0 citations39
ST MICROELECTRONICS INT NV
5 patentsUS10535416B2Jan 14, 2020
Automatic test-pattern generation for memory-shadow-logic testing
ST MICROELECTRONICS INT NV3 citations71
US9812219B2Nov 7, 2017
Automatic test-pattern generation for memory-shadow-logic testing
ST MICROELECTRONICS INT NV3 citations71
US9147453B2Sep 29, 2015
Programmable delay introducing circuit in self timed memory
ST MICROELECTRONICS INT NV0 citations51
US8913457B2Dec 16, 2014
Dual clock edge triggered memory
ST MICROELECTRONICS INT NV1 citations45
US9324414B2Apr 26, 2016
Selective dual cycle write operation for a self-timed memory
ST MICROELECTRONICS INT NV0 citations40